Articles you may be interested inReview of trench and via plasma etch issues for copper dual damascene in undoped and fluorine-doped silicate glass oxide

Thin oxides (≃80 Å) have widespread application as the tunnel oxides for floating gate EEPROM devices and as gate dielectrics for submicron MOS devices. Many EEPROM memory cells require a window to be etched by plasma etching into a relatively thick layer of SiO2 prior to tunnel oxide growth. The high accuracy of defining the tunnel gate area requires sophisticated definition techniques such as stepper lithography and anisotropic plasma etching. This paper describes the effects of anisotropic plasma etching of a 900Å thick thermal oxide on the properties of thin oxides grown subsequently. It is shown that the thin oxide growth rate as well as the oxide breakdown voltage characteristics is affected by the plasma etching conditions.