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Abstract

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The potential impact of high permittivity gate dielectrics on the performance of a ballistic nanoscale CNTFET is studied over a wide range of dielectric permittivities with low temperatures ranging from room temperature down to 100 K. Using the non-equilibrium Greens function (NEGF) formalism. Device characteristics such as ION/IOFF current ratio, threshold voltage, the drain induced barrier lowering (DIBL). The effects of temperature varying are also examined.