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A reliable metal-insulator-metal (MIM) capacitor exceeding 250nF has been integrated into the copper/low-K backend of a high-performance 90nm SOI technology. The reduction of supply grid voltage transients has enhanced microprocessor performance by approximately 10% without increasing the chip area or power consumption.

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Metal thin film resistors have been integrated into a damascene-copper multilayer metallization system for mixed-signal BiCMOS technology platforms. The thin film process can be adjusted to achieve resistors with very low temperature coefficients, high linearity, low noise, and improved matching as compared to resistors based on implanted silicon or polysilicon processing. In addition, improvements good RF performance was observed.

In the context of the Internet of Things, billions of devices—especially sensors—will be linked together in the next few years. A core component of wireless passive sensor nodes is the rectifier, which has to provide the circuit with sufficient operating voltage. In these devices, the rectifier has to be as energy efficient as possible in order to guarantee an optimal operation. Therefore, a numerical optimization scheme is proposed in this paper, which is able to find a unique optimal solution for an integrated Complementary Metal-Oxide-Semiconductor (CMOS) rectifier circuit with Self-Vth-Cancellation (SVC). An exploration of the parameter space is carried out in order to generate a meaningful target function for enhancing the rectified power for a fixed communication distance. In this paper, a mean conversion efficiency is introduced, which is a more valid target function for optimization than the Voltage Conversion Efficiency (VCE) and the commonly used Power Conversion Efficiency (PCE) and is defined as the arithmetic mean between PCE and VCE. Various trade-offs between output voltage, PCE, VCE and MCE are shown, which provide valuable information for low power rectifier designs. With the proposed method, a rectifier in a low power 55 nm process from Globalfoundries (GF55LPe) is optimized and simulated at −30 dBm input power. A mean PCE of 63.33% and a mean VCE of 63.40% is achieved.