IntroductionResistance-based memory has attracted much attention because of its small cell size, simple structure, high speed, and high thermal stability [1][2][3]. WO X based RRAM requires only one extra non-critical mask, no new equipment or new material from the standard CMOS process and is thus especially attractive [4]. Although plasma oxidation produced WO X with reasonable performance, however, the resistance window is relatively small so the MLC capability is limited [5]. In this work we report for the first time the WO X RRAM using rapid thermal oxidation (RTO). Through this new RTO oxidation process, we gain a 10X resistance window, which is more suitable for MLC operation. Both 2-bit/cell and 3-bit/cell operations are examined. Further, low-voltage and high-speed operations are also investigated. Figure 1 shows the cross sectional TEM image and the process flow of the RTO WO X resistive memory. The fabrication process flow follows the conventional back-end-of-line W-plug process. The RTO is performed at 500 o C in oxygen ambient. The thickness of WO X film is about 660Å. The WO X active area is located between the W bottom electrode (BE) and the TiN top electrode (TE). Device Fabrication Results and DiscussionsFigures 2 and 3 show the intrinsic pulse R-V characteristics by positive and negative pulses. Positive pulses reset the device to high resistance states, and negative pulses set the device to a low resistance state. However, the required pulse amplitudes are relatively high. Similar to the WO X fabricated by plasma oxidation [4], after applying a forming step (3.5V/50ns) to the cells, the programming voltages are dramatically reduced (Fig. 4), and the cells are stable for normal operations. The cell resistance is then checked after different 50ns programming pulses. The resistance increases from the low resistance state (LRS) to the high resistance state (HRS) as the pulse amplitude increases. The resistance window of our RTO WO X is 10X of the plasma-oxidized sample [1]; this indicates the performance of WO X RRAM is strongly dependent on the oxidation process. Figure 5 shows the R-V curves from cells with different contact sizes after forming. With a smaller contact, the cell shows a lager resistance window, which is beneficial for scaling. Figure 6 shows programming voltages required for successful SET and RESET operations for 50 cells. The tight distributions mean the contact size and the RTO WO X are both uniform. More interesting is that the RTO WO X device presents excellent cycling endurance-a

We found that the behavior of WO X ReRAM is a strong function of the top electrode (TE) material. The work function (WF) of the top electrode determines both the conduction mechanism and the behavior of the forming process. For a low WF electrode, conduction is space charge limited (SCL), while current from a high WF electrode is dominated by thermionic emission. Thermionic emission is indicative of an interface potential barrier, and this subsequently reduces the switching and forming currents, as well as providing a larger resistance ratio. Based on these insights we have proposed and characterized a novel Ni top electrode WO X ReRAM. The new Ni/WO X /W device operates at a switching current density < 8x10 5 A/cm 2 , with > 100X resistance ratio window, and extremely good data retention of > 300 years at 85 o C.

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To accurately assess the reverse read function during erase verification (EV) in NAND products, a test structure of a NAND string accompanied with a charge-based capacitance measurement (CBCM) circuit is employed. The relationship between bit-line flipping voltage (V BL) and reverse read bias (V REV) is then established. The impact of erase threshold voltage (V T) distribution is also evaluated. Furthermore, this methodology is validated as the result of this test structure is consistent with that of a functional product.

The formation condition, microstructure, and growth kinetics of the WO X layer for WO X ReRAM are investigated. To understand the optimal condition for the rapid thermal oxidation process which forms the WO X layer, various annealing temperature and annealing time are systemically studied through TEM, XRD, Raman spectra analyses and electrical characterizations. The growth kinetics for WO X under RTO is found similar to the one for thermal oxidation on silicon. The electrical forming voltages of the WO X cells are also found independent from the oxide thickness, which further suggests the switching behavior of WO X ReRAM takes place at the interface but not the bulk.