In this paper, SiC MOS capacitors were fabricated and annealed in Ar/O2 = 9:1 ambient with different temperature, and the annealing effects on the reliability and performance of SiC MOS capacitance were investigated. We found that annealing in Ar/O2 ambient is capable to improve the reliability of gate oxide. When annealing in higher temperature, defects near SiO2/SiC interface are reduced, but the gate reliability deteriorated. It is difficult to obtain the best performance and reliability under the same conditions. There is a trade-off between Dit and reliability to adjust the annealing conditions.

In this work, we investigated the oxide reliability of 4H-SiC (0001) MOS capacitors, the oxide was fabricated about 60 nm by thermal oxidation temperature at 1350°C, the oxides than annealed at different temperatures and times in diluted NO (10% in N2). The 4H-SiC MOS structure was analyzed by C-V and I-V measurement. Compared the J-E curves and Weibull distribution curves of charge-to-breakdown for fives samples under different annealing temperature and time, it shows that the high annealing temperature improves the electrical properties as the lifetime enhanced. The mode value of field-to-breakdown (EBD) for thermal oxides by post-oxide-annealing in NO for 30 min at 1350°C was 10.09 MV/cm, the charge-to-breakdown (QBD) of this sample was the highest in all samples, and the QBD value at 63.2% cumulative failure rate was 0.15 C/cm2. The QBD of the sample annealing at 1200°C for 120 min was 0.06 C/ cm2. The effects of NO annealing in high temperature enhance the lifetime of electrical properties and field-to-breakdown obviously. It can be demonstrated that the annealing temperature as high as 1300°C for 30 min can be used to accelerate TDDB of SiC MOS gate oxide.

The threshold voltage of 4H-SiC metal-oxide-semiconductor field-effect transistors (MOSFETs) show instability during normal operation, especially after bias temperature stress (BTS), and this phenomenon is called bias temperature instability (BTI). In this work, to study the factors affecting threshold voltage (Vth) instability of SiC MOSFETs, flat-band voltage (Vfb) instability of 4H-SiC metal-oxide-semiconductor (MOS) capacitors is discussed instead. Some factors, including the polarity of gate bias stress, stress time, and stress temperature, are analyzed by performing one-way bias stress C-V measurements in the devices. Firstly, positive bias stress leads to a positive Vfb shift, and negative bias stress leads to a negative one. Moreover, the Vfb shift appears to exhibit a linear relationship with log (stress time). Furthermore, the Vfb shift decreases over the temperature range of 225 K to 400 K, but slightly increases at 475 K. Finally, the Vfb stability of the MOS devices fabricated by 1200 °C NO post-oxidation annealing (POA) and those fabricated by 1250 °C NO POA is similar.

In order to understand the contribution of various metals in the formation of ohmic contacts, Ni/Al/Ti ohmic contacts on n-type 4H-SiC in terms of a different annealing temperature and Ti composition are investigated, which is more difficult to form than p-type ohmic contact. The formation of the Ni/Al/Ti metal alloy system is much more sensitive to metal composition than annealing conditions. With the increase of metal composition, the contact with a high Ti content yields a lower specific contact resistivity compared with the low Ti contact. The annealed surface morphology and phase resultants were examined by scanning electron microscopy (SEM) and atomic force microscope (AFM), respectively. With the increase of Ti components, the surface morphology of the samples becomes more uniform and smoother, while the surface roughness remains unchanged. It implies that Ti metal can not only reduce the ohmic resistance, but also protect the surface of the sample and maintain the roughness.

We reported that high oxidation temperature is attributed to break Si-C bond and release nitrogen gas to nitrogen ions over 1350°C. The capacitance-voltage characteristics of SiO2/4H-SiC (0001) MOS capacitors fabricated under different thermal oxidation conditions are compared. The dependence of oxidation temperature on device characteristics (such as VFB and ΔVFB) is also analyzed. After a high temperature oxidation, the device reliability of SiC MOS is improved. Such behavior can be attributed to the reduction of the interface traps during high temperature oxidation.