Damage to thin gate oxides from etching of polysilicon gates was studied using gate oxide breakdown histograms and time-dependent dielectric breakdown measurements. The effect of various polysilicon etch parameters was investigated in a radio frequency (rf) triode etcher. Increasing rf power caused a substantial increase in damage. Reducing bias at constant power also resulted in an increase in damage, indicating that ion energy is not the only cause of damage. Area, isolation edge, and source/drain edge contributions to gate oxide defect densities were calculated as a function of rf power during polysilicon etch. As rf power was increased, the area contribution increased the most, indicating that gate oxide damage from polysilicon etching is not an edge phenomenon but a surface phenomenon. The effect of gate oxide thickness was investigated. Damage increased significantly as gate oxide thickness was reduced. Finally, the rf triode etcher was compared with a microwave electron cyclotron resonance (ECR) etcher. The ECR etcher caused fewer damaged capacitors, but some modifications to the triode etch process (such as lower rf power or pure chlorine chemistry) produced fewer damaged capacitors than the ECR.

Articles you may be interested inSignal conditioning for differential temperature measurement with thermistors using a generalized impedance converter Rev. Sci. Instrum. 78, 086114 (2007); 10.1063/1.2778621 Measurement and modeling of time-and spatial-resolved wafer surface temperature in inductively coupled plasmas J.

A high density inductively coupled plasma (ICP) polycide etcher was studied by incorporating it into a 0.5 μm complementary metal–oxide–semiconductor process flow having a nominal 10 nm gate oxide. Polysilicon: oxide etch selectivity, sidewall profile, and critical dimension control were found to be good. Gate oxide damage was studied in detail using both antenna and large capacitor test structures in area- and edge-intensive configurations. No charge buildup was detected using the antenna structures, and damage measured using large capacitors was also very low. Damage was found to be insensitive to bias power, while the sequence of extinguishing the plasma had a small effect. An experimental hardware modification significantly reduced the level of subintrinsic failures of gate edge-intensive capacitors. Split-lot comparisons were made of several etchers using standard hardware and processes, and the rf ICP etcher was found to result in significantly lower oxide damage than the split-power rf triode, plasma-mode rf diode, or microwave electron cyclotron resonance etchers studied. The lowest damage occurred in the ICP, followed by the diode. Langmuir probe measurements were made of plasma potential and ion current for the bulk etch and overetch processes used in the ICP etcher; the results are compared to wafer maps of oxide damage. Plasma potential and ion current are very uniform in this plasma, and no pattern is evident from the wafer maps of breakdown failures. The low oxide damage measured using the ICP etcher probably results from the combination of hardware and process design that ensures a uniform plasma.

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