In this article, we demonstrate the influence of substrate temperature during migration-enhanced epitaxy (MEE) process of GaAs epitaxy on a vicinal surface of Ge (100), 6° offcut towards the (111) plane. It was found that the offcut surface is not the sufficient condition for suppressing the formation of antiphase domains at the GaAs∕Ge interface. Rather, it has to be complemented by low substrate temperature during the MEE process. GaAs grown at 250°C, the lowest temperature among all the samples, exhibits the smoothest surface and best structural and optical qualities, as characterized by atomic force microscopy, cross-sectional transmission electron microscopy, and low-temperature photoluminescence, respectively. At this substrate temperature, As dimers are adsorbed onto the substrate surface more readily with negligible reevaporation, ensuring complete coverage on the Ge surface with double-atomic steps. Complete coverage by As proved to be crucial in preventing the occurrence of inversion boundaries, or at the very least ensure fewer As vacancies that may act as defect centers. Furthermore, low substrate temperature shortens the migration distance of Ga adatoms, minimizing their adsorption into the kinks and step edges, resulting in two-dimensional growth mode instead of step-flow growth mode.

Monolithic CMOS compatible AlGaInP visible LED arrays have been demonstrated on a novel platform called silicon on lattice-engineered substrate (SOLES). SOLES wafers are based on Si 1−x Ge x virtual substrate technology and are suitable for the practical fabrication of SOI CMOS circuits and III-V-based optoelectronic devices on a common silicon substrate. A combination of oxide-oxide wafer bonding and hydrogen-induced exfoliation was used to transfer a thin layer of device-quality silicon on insulator on the top of the Si 1−x Ge x buffers graded to 100% Ge to realize SOLES. Epitaxial layers of a double heterojunction AlGaInP LED emitting near the red region of the visible spectrum (λ = 671 nm) were grown by MOCVD on SOLES wafers using a patterned oxide hard mask. CMOS compatibility was achieved by accessing the n-GaAs cathode of the LED through the underlying n-Ge layer of the Si 1−x Ge x graded buffer rather than etching through the LED stack. The LED was capped with Si to avoid exposing CMOS tools to III-V materials during processing. The Si anode and Ge cathode of the resulting LED structure were contacted using Ti/Al CMOS compatible metallurgy. The prototype array is an important step towards the realization of monolithically integrated optical interconnects in high speed digital systems.

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Experimental demonstration of pseudomorphic heterojunction bipolar transistors with cutoff frequencies above 600 GHz Appl. Phys. Lett. 86, 152101 (2005); 10.1063/1.1897831Comparison of As-and P-based metamorphic buffers for high performance InP heterojunction bipolar transistor and high electron mobility transistor applications High gain AlGaAs/ GaAs heterojunction bipolar transistors grown on SiGe/ Si substrate have been fabricated. Measured peak dc current gain of ϳ100 is obtained for a device with emitter area of ϳ1.6ϫ 10 3 m 2 , with base concentration of 1 ϫ 10 19 cm −3 . The dominant base current component is discussed and determined. The breakdown characteristic is studied and compared with that of the device grown on GaAs substrate. Our experimental results demonstrate that SiGe/ Si substrate could provide a robust method for monolithic integration of high speed GaAs-based electronic devices with silicon-based circuitry.

We studied the electroluminescence and structural characteristics of five-layer stacked self-assembled InAs/In0.1Ga0.9As quantum dot (QD) structures grown on graded Si1−xGex/Si substrate. The QD was found to take on a lens shaped structure with aspect ratio of 0.23±0.05. Room-temperature electroluminescence at 1.29 μm was observed from the QD structures. The external quantum efficiency as function of injected current was investigated and the dominant carrier recombination processes were identified from analysis of the current-optical power relationship.