Test chips built in a 32nm bulk CMOS technology consisting of hardened and non-hardened sequential elements have been exposed to neutrons, protons, alpha-particles and heavy ions. The radiation robustness of two types of circuit-level soft error mitigation techniques has been tested: 1) SEUT (Single Event Upset Tolerant), an interlocked, redundant state technique, and 2) a novel hardening technique referred to as RCC (Reinforcing Charge Collection). This work summarizes the measured soft error rate benefits and design tradeoffs involved in the implemented hardening techniques.
We report 89 Y and 17 O NMR (9 T) echo decays for YBa 2 Cu 3 O 7 and correct for contributions from dipolar coupling 63,65 Cu in order to isolate effects of vortex dynamics. We confirm vortex localization in the solid state with rms displacements consistent with Langevin dynamical theory, but with motional dynamics at time scales ͑10 100 ms͒ some ϳ10 6 times slower than predicted. Vortex migration over longer time scales is restricted to distances less than 1/100 of an intervortex spacing over times as long as 100 ms, in contrast with the rapid long range diffusion occurring in the liquid state.
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