Chemical mechanical planarization (CMP) of copper is a critical step in advanced IC interconnects technology. The key performance metrics of a Cu CMP are the removal rate, removal rate profile, dishing and erosion, process window, and defectivity. Many researchers have studied the mechanisms of Cu CMP. The present investigations will mainly focus on the mechanical effects on advanced Cu CMP at low down forces. The two main mechanical factors, intrinsic properties of abrasives and polishing process conditions, were evaluated. It was found that the abrasive properties such as mean size, surface area, solid concentration and process conditions such as polishing down force and rotation speed have strong impacts on Cu CMP performance.

CMEMS(CMOS and Micro Electro Mechanical Systems) process is integration of CMEMS and cap wafer, which is realized through bonding process and has been more and more important in IC industry currently. The bonding process is kernel in CMEMS manufacture and is impacted by material, pressure, temperature and so on. In standard bonding process, Al-Ge bonding which is selected for the good adhesion comparing with other bonding material. In this paper, the bonding process conditions are designed according to the structure of CMEMS and characteristics of Al-Ge material, and experiments including leakage rate and bonding strength are implemented to discuss the bonding quality. In the end, suitable bonding process and its summary of side effect for Al-Ge are put forward.

Hillock is formed at the film surface in Cu metallization process. During the growth of hillock, the tensile stress built in the copper (Cu) metal film due to the relieved thermal expansion coefficients. These "hillocks" are just areas of localized copper elevation relative to the rest of the surface that can lead to non-uniformity during etch-stop dielectric deposition. It is important to understand how the hillock is created in order to develop an effective preventative process. In this paper, the degas temperature performance and effect on the hillock in Cu metallization process is introduced, then an effective approach to reduce hillock defect is demonstrated.

Poly doped with phosphor and WSix are generally used as the gate-stack for deep trench DRAM product. These two films are critical ones that influence CP yield. In manufacturing, yield can gain much after solving Isb (I-standby) failure caused by gate WSix extrusion. Researches presented tungsten rich during WSix deposition or O2 leak during gate anneal process could lead to WSix extrusion (1), (2). Our study reveals that the concentration of phosphor, [P] in gate poly is another critical parameter to cause WSix extrusion after polycide pull-back process. In this paper, the mechanism of WSix extrusion is described and an optimized poly deposition process is proposed to solve Isb failure.

In advance Cu BEOL process, Encore Ta/TaN deposition process is widely used for barrier layer deposition to achieve lower via resistance and better electro migration and stress migration performance. However, wafer micro arcing existed frequently due to complex chamber design and DC