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Water tree degradation phenomenon constitutes a serious problem in XLPE insulated power cables. The presence of water trees lead to harmonic components in the insulation loss current, of which analysis provides a powerful indication of the state of the degradation. The first goal of this study is to establish a procedure to recover the measured loss current waveform in XLPE cables with water tree degradation by numerical calculations, and the second is to identify the loss current component from the total current that flows in the insulation. A new methodology based on the measured loss current waveform and the parameters calculations of the suggested equivalent circuit for the insulation with water trees is presented. It allows getting the THD of the loss current, the dissipation factor (tan δ) and the power losses in the insulation (p). It is also possible to determine its equivalent capacitance (C) and equivalent resistance (R). It is shown that the proposed methodology reproduces with a very good accuracy the loss current waveforms obtained in experiments.

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Abstract-Process variability and environmental fluctuations deeply affect the digital circuits performance in many different ways, one of them, the data processing time which may cause error on synchronous digital circuits due to underestimated time violations. This situation is commonly avoided adding time margins to the clock signal making it larger than nominal worstcase data process time, penalizing the global performance. In this paper a new mechanism for compensating both environmental fluctuations and process parameters variations effects on digital circuits is presented. The environmental compensation mechanism regenerates the clock signal for a pipelined system stages adding a compensated skew component depending on the local environmental conditions of every one of these stages. The process variations are corrected with a calibration circuit which adjusts the clock period in every stage taking into account its particular static deviations.

Abstract-Voltage fluctuations caused by parasitic impedances in the power supply rails of modern ICs are a major concern in nowadays ICs. The voltage fluctuations are spread out to the diverse nodes of the internal sections causing two effects: a degradation of performances mainly impacting gate delays and a noisy contamination of the quiescent levels of the logic that drives the node. Both effects are presented together, in this paper, showing than both are a cause of errors in modern and future digital circuits. The paper groups both error mechanisms and shows how the global error rate is related with the voltage deviation and the period of the clock of the digital system.