We demonstrate a new self-aligned TFT process for hydrogenated amorphous silicon thin-film transistors (a-Si:H TFT's). Two backside exposure photolithography steps are used to fabricate fully self-aligned tri-layer TFT's with deposited n + contacts. Since no critical data alignment is required, this simple process is well suited to fabrication of short channel TFT's. We have fabricated fully self-aligned tri-layer a-Si:H TFT's with excellent device performance, and contact overlaps <1 m. For a 20-m channel length TFT with an a-Si:H thickness of 13 nm, the linear region (V DS = 0:1 V) and saturation region (V DS = 25 V) extrinsic mobility values are both 1.2 cm 2 /V-s, the off currents are <1 pA, and the on/off current ratio is >10 7 :

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Using a thermal mountant, we have fabricated hydrogenated amorphous silicon (a-Si:H) thin film transistors (TFTs) and integrated circuits on both colored and nearly colorless polyimide substrates with performance very similar to devices fabricated on glass substrates. Delay and power dissipation were measured with ring oscillators; minimum stage delay was less than 10 psec, and minimum power dissipation was less than 10 pW per stage. These results indicate that with suitable thermal engineering, a-Si:H devices and circuits can be fabricated on polymeric substrates using nearly standard processing.

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