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This paper presents a fully programmable All-Digital PLL (ADPLL) circuit that is able to synchronize any frequency between 12MHz and 200MHz, with a frequency between 24Hz and 100MHz. This ADPLL circuit uses a Direct Digital Period Synthesizer as a digitally controlled oscillator. The measured jitter at the output is between 184 and 274ps (depending on control parameters). The circuit is implemented in 0.18µm CMOS technology and dissipates 50mW when running at 150MHz.