An interface dipole model explaining threshold voltage (Vt) tuning in HfSiON gated n-channel field effect transistors (nFETs) is proposed. Vt tuning depends on rare earth (RE) type and diffusion in Si∕SiOx∕HfSiON∕REOx/metal gated nFETs as follows: Sr<Er<Sc+Er<La<Sc<none. This Vt ordering is very similar to the trends in dopant electronegativity (EN) (dipole charge transfer) and ionic radius (r) (dipole separation) expected for a interfacial dipole mechanism. The resulting Vt dependence on RE dopant allows distinction between a dipole model (dependent on EN and r) and an oxygen vacancy model (dependent on valence).

A silicate reaction between lanthana and silica layers has been utilized to eliminate interfacial silica in metal-insulator-semiconductor devices and to obtain devices with very low equivalent oxide thickness ͑EOT͒. This provides a simple process route to interface elimination, while producing a silicate dielectric with a higher temperature stability of the amorphous phase. The La 2 O 3 layers in this study are deposited by reactive evaporation on ͑001͒ Si covered by a ϳ0.8-1.0-nm-thick SiO 2 chemical oxide, and are capped in situ with a Ta gate, followed by a reaction anneal, which lowers the EOT from greater than 1.5 nm for the as-deposited bilayer stack to as low as 0.5 nm. Electron energy-loss spectroscopy and medium-energy ion scattering are used to show that a temperature of 400°C is sufficient for the formation of the silicate gate dielectric. Gate leakage currents as low as 0.06 A / cm 2 are obtained for stacks having an EOT of 0.63 nm, orders of magnitude below that of SiO 2 having the same EOT value. Electrical breakdown is observed at applied fields above 16 MV/ cm.

A La2O3 capping scheme has been developed to obtain n-type band-edge metal gates on Hf-based gate dielectrics. The viability of the technique is demonstrated using multiple metal gates that normally show midgap work function when deposited directly on HfSiO. The technique involves depositing a thin interfacial of La2O3 on a Hf-based gate dielectric prior to metal gate deposition. This process preserves the excellent device characteristic of Hf-based dielectrics, but also allows the realization of band-edge metal gates. The effectiveness of the technique is demonstrated by fabricating fully functional transistor devices. A model is proposed to explain the effect of La2O3 capping on metal gate work function.

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Alkali (Rb and Cs) and alkaline earth (Ca, Sr, and Ba) elements have been investigated as interface passivation materials for metal-oxide-semiconductor field-effect transistors (MOSFETs) on 4H-SiC (0001). While the alkali elements Rb and Cs result in field-effect mobility (μFE) values > 25 cm2/V·s, the alkaline earth elements Sr and Ba resulted in higher μFE values of 40 and 85 cm2/V·s, respectively. The Ba-modified MOSFETs show a slight decrease in mobility with heating to 150 °C, as expected when mobility is not interface-trap-limited, but phonon-scattering-limited. With a Ba interface layer, the interface state density 0.25 eV below the conduction band is ∼3 × 1011 cm−2 eV−1, lower than that obtained with nitric oxide passivation. Devices show stable threshold voltage under 2 MV/cm gate bias stress at 175 °C, indicating no mobile ions. Secondary-ion mass spectrometry shows that the Sr and Ba stay predominantly at the interface after oxidation anneals.