As semiconductor based devices are manufactured on ever thinner silicon substrates, the required associated die break strength has to increase commensurately to maintain pick yields. In this study, the influence of laser processing parameters on the die break strength in laser dicing of silicon oxide-coated silicon wafers and silicon-based memory devices is investigated experimentally using ultraviolet lasers spanning a wide range of pulse width, from 400 fs to 150 ns. It is found that the net fluence, an accumulated pulse energy per surface area, is a meaningful process metric for damage induced by heat-affect zone to compare lasers processes with a large variety of pulse widths, laser scan speed, average powers, and repetition rates. Optimized process conditions for both nanosecond and femtosecond pulse widths are identified for achieving the highest die break strength in the target devices. The dependence of heat-affected zone on pulse width and net fluence during nanosecond laser processing is further demonstrated using multiphysical simulations. Simulations suggest that the thickest heat-affected zone section during laser scribing is typically located at the boundary of the laser incident surface. Simulation results also show that for a given repetition rate the heat-affected zone becomes larger as the net fluence increases due to smaller interpulse separation, consistent with the experimental observation.

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3D packaging technologies such as FLASH rely on die-to-die stacking of ultra-thin silicon devices with individual die thicknesses below 100 um. Because ultra-thin silicon wafers are very fragile, mechanical saw dicing of sub 100 um thick wafers tends to be more challenging, requiring slower processing and reduced throughput and/or yields. These challenges make full cut laser dicing an attractive solution. This presentation provides an investigation for machining of 50 um thick silicon wafers using a Gaussian-shaped, nanosecond pulsewidth, 355 nm UV laser. A range of machining speeds and laser fluences are compared, from single laser pulses to highly overlapped slow-velocity machining. 3D Laser Scanning Microscope and FIB/TEM cross sections are employed to characterize the state and depth of heating damage into the Si material. Implications for laser machining rates and die break strength are investigated for full cut laser dicing.

Presented here are laser processes for drilling debris-free and recast-free vias in silicon that are suitable for subsequent process integration. The process strategy consists of an integrated laser via drill system combined with an isotropic dry etch system. By careful selection of both the laser and etch process parameters it is possible to control the via depth, diameter, sidewall slope/taper, and to eliminate the damaged Si material in the laser heat affected zone. Because the etch process is highly selective to Si, this is a mask-free and cost-effective process. Two different laser processes are demonstrated. For Part 1 we demonstrate a process for TSVs with diameters in the range of 50–250 um for <500 um thick Si wafers. For Part 2 we demonstrate a process for blind vias in Si stopping on a metal layer with diameters ≤50 um for ≤50 um thick Si wafers.

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