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Purpose The paper aims to present the novel design approach for a low power LC-voltage-controlled oscillators (VCO) design with low phase noise that too targeted at the most sought band of Bluetooth applications. Owing to their crucial role in a wide variety of modern applications, VCO and phase-locked loop (PLL) frequency synthesizers have been the subject of extensive research in recent years. In fact, VCO is one of the key components being used in a modern PLL to provide local frequency signal since a few decades. The complicated synthesizer requirements imposed by cellular phone applications have been a key driver for PLL research. Design/methodology/approach This paper first opted to present the recent developments on implemented techniques of LC-VCO designs in popular RF bands. An LC-VCO with a differential (cross-coupled) MOS structure is then presented which has aimed to compensate the losses of an on-chip inductor implemented in UMC’s 130 nm RF-CMOS process. The LC-VCO is finally targeted to embed onto the synthesizer chip, to address the narrowband (S-Band) applications where Bluetooth has been the most sought one. The stacked inductor topology has been adopted to get the benefit of its on-chip compatibility and low noise. The active differential architecture, which basically is a cross-coupled NMOS structure, has been then envisaged for the gain which counters the losses completely. Three major areas of LC-VCO design are considered and worked upon for the optimum design parameters, which includes Bluetooth coverage range of 2.410 GHz to 2.490 GHz, better linearity and high sensitivity and finally the most sought phase noise performance for an LC-VCO. Findings The work provides the complete design aspect of a novel LC-VCO design for low phase noise narrowband applications such as Bluetooth. Using tuned MOS varactor, in 130 nm-RF CMOS process, a high gain sensitivity of 194 MHz/Volt was obtained. Thus, the entire frequency range of 2415-2500 MHz for Bluetooth applications, supporting multiple standards from 3G to 5G, was covered by voltage tuning of 0.7-1.0 V. To achieve the low power dissipation, low bias (1.2 V) cross-coupled differential structure was adopted, which completely paid for the losses occurred in the LC resonator. The power dissipation comes out to be 8.56 mW which is a remarkably small value for such a high gain and low noise VCO. For the VCO frequencies in the presented LO-plan, the tank inductor was allowed to have a moderate value of inductance (8 nH), while maintaining a very high Q factor. The LC-VCO of the proposed LO-generator achieved extremely low phase noise of −140 dBc/Hz @ 1 MHz, as compared to the contemporary designs. Research limitations/implications Though a professional tool for inductor and circuit design (ADS-by Keysight Technologies) has been chosen, actual inductor and circuit implementation on silicon may still lead to various parasitic evolutions; therefore, one must have that margin pre-considered while finalizing the design and testing it. Practical implications The proposed LC-VCO architecture presented in this work shows low phase noise and wide tuning range with high gain sensitivity in S-Band, low power dissipation and narrowband nature of wireless applications. Originality/value The on-chip stacked inductor has uniquely been designed with the provided dimensions and other parameters. Though active design is in a conventional manner, its sizing and bias current selection are unique. The pool of results obtained completely preserves the originally to the full extent.

A novel, dual edge-shaped frequency reconfigurable antenna with a highly compact size is proposed, using microstrip line-based inset-feed mechanism. Proposed antenna uses cost-effective ROGER substrate of 0.787 mm thickness. The tuning reconfigurability has been achieved using two PIN diode switches, placed on the patch surface. The On-Off switching combinations of the PIN diodes provide variations in the current distribution and thereby altering the resonant frequencies. The proposed antenna offers the resonating spectrum in the range of 3 GHz to 9 GHz approximately, with maximum tuning efficiency of 43 % at 6.5 GHz, covering majority of modern RF standards. The proposed patch antenna design radiates with a reasonably high gain of 2.3 dBi at 5.04 GHz, with effective bandwidth of 2800 MHz (maximum at 6.5 GHz). The proposed multiband antenna with radome structure (ABS material) has been investigated under high-frequency simulation environment of HPEEsof (ADS-Keysight Technologies) and 3d radiation pattern (far-field gain, directivity and power calculations) have been obtained using momentum and EMDS. The final implementation size (without radome structure) comes as 23 mm X 26 mm large (595 mm 2 ). The proposed design paves the way for wireless applications including WLAN and WiMAX communication with its uniform far-field radiation pattern.

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