Thermal budget is always a vital element in Si-based superlattice materials processing. In this work, a novel n-type ohmic contacting scheme with a low processing thermal budget is developed by combining the high-dose ion implantation and low-temperature alloying techniques. The optimized specific contact resistivity (ρc) is reduced to 6.18×10-3 Ω·cm² at a low thermal budget of 400 °C, and this is a result of the efficient low-temperature electrical activation in amorphous substances. It is indicated that both the high doping concentration and the formation of NiSi(Ge) alloy phase contribute to the linear ohmic contacting behavior. The ohmic contact resistance dependency on processing temperature is further revealed by a detailed Ni/Si(Ge)-alloying model. A minimum ρc of 2.51×10−4 Ω·cm² is achieved at a thermal budget of 450 °C, which is related to the high bonding intensity at metal/semiconductor interface. Note that this technique is compatible with standard Si-based CMOS process flow, and meanwhile can be applied in high-performance insulated-gate field-effect transistor (IGFET) fabrication. Furthermore, it is verified in our IGFETs that Si/Ge superlattice structures can serve as an efficient potential barrier to constrain electrons.

The exploration of multi-gate-controlled electron transport characteristics is always a research focus in Si-based device development and optimization. In this work, we report individual and dual gate-controlled energy band regulations of 30 nm-thick Si membrane and the resulted electron transportations at 10 to 300 K. It is discovered that the fine energy band structure is a key element to determine electron transport behaviors in FDSOI. Furthermore, either the front or the back gate bias can modify the energy band bending and sub-band gap, change charged body distribution and intersub-band transition probability, and thus adjust electron mobility and device performance. This dual gate coupling effect together with the proposed gate-controlled sub-band structure model is confirmed by magnetotransport experiments at 1.6 K. Notably, our work presents the coupled gate controlling effects within ultrathin Si film, and gives a physical insight into electron structure modulating, which may promote the evolution of Si-based device applications in many domains.

Exploring the cryogenic transport properties of two-dimensional electron gas in semiconductor heterostructures is always a focus of fundamental research on Si-based gate-controlled quantum devices. In this work, based on the electrical and magnetic transport characteristics of Si/SiGe heterostructure Hall-bar shaped field effect transistors (FETs) at 10 K and 1.6 K, we study the effects of electron tunneling that occurs in the heterostructure and populates the oxide/semiconductor interface on its transport properties. The initial position of dual-channel conduction is determined by the gate-controlled electrical hysteresis curves. Furthermore, we discover that there exist different tunneling mechanisms of electrons in Si quantum well under the action of gate voltage, and the electron tunneling can well explain the two drain current plateaus appearing in direct-current transfer characteristics. Combining the power-law exponent of electron mobility versus density curve and the gate-related Dingle ratio, we clarify the dominant scattering mechanism and the result can be supported by different tunneling mechanisms. Our work demonstrates the gate-depended electronic transport performance in undoped Si/SiGe heterostructure FETs, which has an implication for the development of Si/SiGe heterostructure gate-defined quantum dot quantum computation.