To implement artificial neural networks (ANNs) based on memristor devices, it is essential to secure the linearity and symmetry in weight update characteristics of the memristor, and reliability in the cycle-to-cycle and device-to-device variations. This study experimentally demonstrated and compared the filamentary and interface-type resistive switching (RS) behaviors of tantalum oxide (Ta2O5 and TaO2)-based devices grown by atomic layer deposition (ALD) to propose a suitable RS type in terms of reliability and weight update characteristics. Although Ta2O5 is a strong candidate for memristor, the filament-type RS behavior of Ta2O5 does not fit well with ANNs demanding analog memory characteristics. Therefore, this study newly designed an interface-type TaO2 memristor and compared it to a filament type of Ta2O5 memristor to secure the weight update characteristics and reliability. The TaO2-based interface-type memristor exhibited gradual RS characteristics and area dependency in both high- and low-resistance states. In addition, compared to the filamentary memristor, the RS behaviors of the TaO2-based interface-type device exhibited higher suitability for the neuromorphic, symmetric, and linear long-term potentiation (LTP) and long-term depression (LTD). These findings suggest better types of memristors for implementing ionic memristor-based ANNs among the two types of RS mechanisms.

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Currently, analog in-memory computing, employing memristors into a crossbar array architecture (CAA), is the leading system among available neuromorphic hardware. This study presents a highly tunable synaptic weight update based on a multiterminal memtransistor device as a solution for nonlinear synaptic operations and crosstalk issues in CAA memristors, which are long-standing challenges in neuromorphic hardware applications. To explore an effective device structure for tunable weight update properties, a memtransistor device with a series and parallel structure functioning by interface type and oxygen migration is fabricated using a ZnO channel layer and an amorphous TiO2 memristor. The series memtransistor device exhibits a significant tunable weight update property at the gate knob; thus, it simultaneously can function as a selector (accelerating and inhibiting weight update) in the CAA and tune and ultimately improve the linearity of the potentiation and depression curves. Neuromorphic hardware based on tunable synaptic weight update functions provides advantageous features for accuracy and crosstalk issues. Using the Fashion-MNIST pattern recognition simulation, the tuned weight update properties are obtained by three different write and read condition combinations, and the results are close to ideal accuracy.

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Two-dimensional materials and their heterostructures have thus far been identified as leading candidates for nanoelectronics owing to the near-atom thickness, superior electrostatic control, and adjustable device architecture. These characteristics are indeed advantageous for neuro-inspired computing hardware where precise programming is strongly required. However, its successful demonstration fully utilizing all of the given benefits remains to be further developed. Herein, we present van der Waals (vdW) integrated synaptic transistors with multistacked floating gates, which are reconfigured upon surface oxidation. When compared with a conventional device structure with a single floating gate, our double-floating-gate (DFG) device exhibits better nonvolatile memory performance, including a large memory window (>100 V), high on−off current ratio (∼10 7 ), relatively long retention time (>5000 s), and satisfactory cyclic endurance (>500 cycles), all of which can be attributed to its increased charge-storage capacity and spatial redistribution. This facilitates highly effective modulation of trapped charge density with a large dynamic range. Consequently, the DFG transistor exhibits an improved weight update profile in long-term potentiation/ depression synaptic behavior for nearly ideal classification accuracies of up to 96.12% (MNIST) and 81.68% (Fashion-MNIST). Our work adds a powerful option to vdW-bonded device structures for highly efficient neuromorphic computing.