The automation of the design of electronic systems and circuits [electronic design automation (EDA)] has a history of strong innovation. The EDA business has profoundly influenced the integrated circuit (IC) business and vice-versa. This paper reviews the technologies, algorithms, and methodologies that have been used in EDA tools and the business impact of these technologies. In particular, we will focus on four areas that have been key in defining the design methodologies over time: physical design, simulation/verification, synthesis, and test. We then look briefly into the future. Design will evolve toward more software programmability or some other kind of field configurability like field programmable gate arrays (FPGAs). We discuss the kinds of tool sets needed to support design in this environment.

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Process technology advances tell us that the one-million gate Field-Programmable Gate Array (FPGA) will soon be here, and larger devices shortly after that. We feel that current architectures will not extend directly to this scale because: they do not handle routing delays effectively; they require excessive compile/place/route times; and because they do not exploit new opportunities presented by the increase in available transistors and wiring. In this paper we describe several challenges that will need to be solved for these large-scale FPGAs to realize their full potential.

Field ProgrammableGate Arrays (FPGA's) are a relatively new type of chip. This paper describes the software necessary to support two distinct but closely related aspects of them: the development of a new FPGA architecture, arrd the use of FPGA's from an application viewpoint.The basic CAD support structure consists of a set of file formats and programs that successively bind and evaluate design decisions. The FPGA designer starts by specifying a block architecture as a schematic. This is analyzed, manipulated, and condensed into a set of files that characterize the routing capabilities and programming requirements of the proposed FPGA design. The application designer specifies a circuit in a standard format (SLIF). This is bound to the resources available in the generic FPGA. The result is a configuration file that maps the application onto the proposed FPGA fabric. During FpGA developmen~the efficiency of this mapping can be analyzed, and the architecture modified.Once the FPGA has been fabricated, the configuration data can be sent to the actuat hardware.