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Silicide materials used as contacts in CMOS devices have evolved over many technology nodes. This article traces the often forgotten defectivity related reasons that were the primary drivers for a change in materials or process flow -evolving from Ti to Co and Ni silicides, and the more recent return to Ti-based liner silicides. The criteria used for the selection of these metal silicides have undergone a dramatic change with the advent of 3-D transistors and trench silicide contacts, and is now primarily guided by the value of interfacial contact resistivity (ρ c ). Furthermore, using results from synchrotron X-ray diffraction and pole-figure analysis, we present how phase formation and microstructure of contacts vary with Ti thickness, alternative annealing treatments, and substrate composition and orientation.We show that microstructure in very thin films can change from amorphous to epitaxial, a factor likely to become important for the contacts in upcoming generations of devices.

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In this letter, the Schottky barrier height of erbium silicide contacts formed on Si 1−x C x alloys was measured. The alloys were pseudomorphically grown on Si wafers with 0% to 1.2% C occupying the substitutional sites. Schottky barrier diodes were fabricated with an ideality factor of 1.13 or less. The hole barrier height was found to be 0.73 eV independent of the C concentration. This suggests that the electron barrier height should decrease with increasing C concentration due to the reduction in the semiconductor bandgap. For 1.2% C, the electron barrier is estimated to be 0.29 eV.