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This paper addresses the detection of hydrogen leaks for safety warning systems in automotive applications and the measurement of nitrogen oxide concentration in exhaust gases of zero-emission vehicles. The presented approach is based on the development of accurate models (including nonlinearity and error sources of real building components) for all the system elements: sensors and acquisition chain. This methodology enables efficient design space exploration and sensitivity analysis, allowing an optimal analog-digital and hardware-software partitioning. Such analysis drives also the development of effective data fusion techniques to reduce the measure uncertainty (due to cross-sensitivity to other gases or to temperature/humidity variations). Such techniques have been implemented on a microcontroller-based mixed-signal embedded platform for intelligent sensor interfacing with limited complexity, suitable for automotive applications

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This paper presents the design, implementation, and validation of a FlexRay transceiver and a SpaceWire (SpW) router and interface, which constitute the main hardware building blocks of the two in-vehicle communication standards. The FlexRay protocol features data rates up to 10 Mb/s and time- and event-triggered transmissions, along with scalable fault-tolerance support, and it is expected to become the standard network for X-by-wire and active safety automotive systems. However, collision avoidance and driver-assistance applications based on camera/radar sensors require data rates up to hundreds of megabits per second as well as fault tolerance, features that can hardly be covered by current or expected automotive standards. In this scenario, a promising technology seems to be the new SpW protocol, currently used in avionics and aerospace

The paper presents a multi-processor architecture for real-time and low-power image and video enhancement applications. Differently from other state-of-the-art parallel architectures the proposed solution is composed of heterogeneous tiles. The tiles have computational and memory capabilities, support different algorithmic classes and are connected by a novel Network-on-Chip (NoC) infrastructure. The proposed packet-switched data transfer scheme avoids communication bottlenecks when more tiles are working concurrently. The functional performances of the NoC-based multi-processor architecture are assessed by presenting the achieved results when the platform is programmed to support different enhancement algorithms for still images or videos. The implementation complexity of the NoC-based multi-tile platform, integrated in 65 nm CMOS technology, is reported and discusse