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Abstract:In this paper, output capacitor-less low-dropout (LDO) regulator using active-feedback and current-reuse feedforward compensation (AFCFC) is presented. The open-loop transfer function was obtained using small-signal modeling. The stability of the proposed LDO was analyzed using pole-zero plots, and it was confirmed by simulations that the stability was ensured under the load current of 50 mA. The proposed compensation method increases gain-bandwidth product (GBW) and reduces the on-chip compensation capacitor. The proposed AFCFC technique was applied to a three-stage output capacitor-less LDO. The LDO has a GBW of 5.6 MHz with a small on-chip capacitor of 2.6 pF. Fast-transient time of 450 ns with low quiescent current of 65.8 µA was achieved. The LDO was fabricated in 130 nm CMOS process consuming 180 × 140 µm 2 of the silicon area.

This paper presents a fractional-N phase-locked loop based spread spectrum clock generator (SSCG) using a programmable linear frequency modulator. The SSCG provides a programmable frequency deviation and modulation frequency regardless of its operating frequency. The ranges of frequency-deviation ratio and modulation frequency are 0-80% and 0-100 kHz with 610 Hz step resolution. The proposed SSCG successfully support five serial-link standards by using a single SSCG, and can be applied to various switching circuits such as class-D power amplifiers or switching power converters. The EMI reduction was measured to be 10.24-13.94 dB under 100-kHz resolution bandwidth. The proposed SSCG was fabricated using a 0.13-μm CMOS process with an active area of 0.11 mm 2 , while consuming an overall power of 6.28 mW at 1 GHz. Index Terms-EMI reduction, frequency modulation, phase locked loop (PLL), spread spectrum clock generator (SSCG). 0018-9375Sangyong Park (S'11) received the B.S. and M.S. degrees from the School of Electrical Engineering, Chung-Ang University, Seoul, South Korea, in 2011 and 2013, respectively. He is currently working toward the Ph.D. degree at the School of Electrical Engineering, Chung-Ang University.His research interests include delta-sigma modulators, the design of linear regulators for wireless communication, and clock and data recovery circuits for high speed communication using CMOS technology.Eun-Taek Sung (S'14) received the B.S. degree from the School of Electrical Engineering, Chung-Ang University, Seoul, South Korea, in 2014. He is currently working toward the M.S. degree at the School of Electrical Engineering, Chung-Ang University.His research interests include the design of lowpower and energy-efficient sensor interfaces, data converters, and high performance clock generators for wireless sensor networks.Seung-Gi Lee received the B.S. degree from the School of Electrical Engineering, Chung-Ang University, Seoul, South Korea, in 2015. He is currently working toward the M.S. degree at the School of Electrical Engineering, Chung-Ang University.His research interests include the design of linear regulators, high power amplifier, and CMOS RF transceiver design for the wireless communication. DonghyunBaek (S'98-M'07-SM'13) received the B.S., M.S., and Ph.D. degrees from the