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Reported here is a new chemical route for the wet chemical functionalization of germanium (Ge), whereby arsanilic acid is covalently bound to a chlorine (Cl)-terminated surface. This new route is used to deliver high concentrations of arsenic (As) dopants to Ge, via monolayer doping (MLD). Doping, or the introduction of Group III or Group V impurity atoms into the crystal lattice of Group IV semiconductors, is essential to allow control over the electronic properties of the material to enable transistor devices to be switched on and off. MLD is a diffusion-based method for the introduction of these impurity atoms via surface-bound molecules, which offers a nondestructive alternative to ion implantation, the current industry doping standard, making it suitable for sub-10 nm structures. Ge, given its higher carrier mobilities, is a leading candidate to replace Si as the channel material in future devices. Combining the new chemical route with the existing MLD process yields active carrier concentrations of dopants (>1 × 1019 atoms/cm3) that rival those of ion implantation. It is shown that the dose of dopant delivered to Ge is also controllable by changing the size of the precursor molecule. X-ray photoelectron spectroscopy (XPS) data and density functional theory (DFT) calculations support the formation of a covalent bond between the arsanilic acid and the Cl-terminated Ge surface. Atomic force microscopy (AFM) indicates that the integrity of the surface is maintained throughout the chemical procedure, and electrochemical capacitance voltage (ECV) data shows a carrier concentration of 1.9 × 1019 atoms/cm3 corroborated by sheet resistance measurements.

The IEEE International Roadmap for Devices and Systems (IRDS) for More Moore devices summarises the Logic Device state of play very effectively; the FinFET is the key device architecture that could enable logic device scaling until 2025. Increasing fin height while reducing number of fins at unit footprint area is an effective solution to improve performance. It is forecasted that the parasitics will remain as a dominant term in the performance of critical paths. For reduced supply voltage, a transition to gate-all-around (GAA) structures such as lateral nanowires or nanosheets will be necessary to improve electrostatics. Lateral GAA structure would eventually evolve in to the vertical GAA structure to gain back the performance loss due to increasing parasitics at tighter pitches. In this paper we will consider doping techniques based on ion implant, solid-source in-diffusion, liquid-source in-diffusion, and gas-source in-diffusion for these device technologies.

This paper presents comprehensive density functional theory-based simulations to understand the characteristics of dopant atoms in the core and on the surface of ultra-thin sub-5 nm Si films. Quantum confinement-induced bandgap widening has been investigated for doped Si films considering two different doping concentrations. Thickness-dependent evolution of dopant formation energy is also extracted for the thin films. It is evident from the results that doping thinner films is more difficult and that dopant location at the surface is energetically more favorable compared to core dopants. However, the core dopant generates a higher density of states than the surface dopant. Projecting the carrier states in the doped Si film onto those of a reference intrinsic film reveals dopant-induced states above the conduction band edge, as well as perturbations of the intrinsic film states. Furthermore, to experimentally evaluate the ab initio predictions, we have produced ex situ phosphorus-doped ultra-thin-Si-on-oxide with a thickness of 4.5 nm by the beam-line ion implantation technique. High-resolution transmission electron microscopy has confirmed the thickness of the Si film on oxide. Transfer length method test structures are fabricated, and the temperature-dependent electrical characterization has revealed the effective dopant activation energy of the ion-implanted phosphorus dopant to be ≤ 13.5 meV, which is consistent with our theoretical predictions for comparable film thickness. Ultra-thin Si films are essential in the next generation of Si-based electronic devices, and this study paves the way toward achieving that technology.

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