A high speed, LSI, n-channel Si-Gate technology has been developed and characterized for the manufacture of integrated circuits. Utilizing the advantages of local oxidation and ion implantation, a technology is achieved which is: (a) fabricated on high resistivity Si substrates; (b) quasi-planar in topological structure; (c) completely adjustable in gate threshold voltage (enhancement and depletion modes) and field threshold voltage; and (d) highly reproducible in electrical parameter control. Additionally, by employing a thin gate insulator structure (sio2, 75d) a factor of increase in gain is realized with respect to standard p-channel MOSFETs. 4,096 bit dynamic RAM circuits have been designed and fabricated in this technology. Typical access times of $50 nanoseconds with high circuit yields are realized.

This article describes the design steps for generating custom and semi‐custom integrated circuits for digital terminals. The design styles and processing techniques are discussed with special emphasis on the interaction of the device organization with the system organization. Metal‐oxide‐semiconductor technology makes possible high‐packing‐density custom integration. Logic conversion is verified by simulation, layout is performed automatically, and timing is verified by using layout information as input to the timing simulator. Gate arrays facilitate semi‐custom designing at low cost for modest scales of integration. The same design automation tools are used for both custom and semi‐custom integration. Complementary bipolar integrated circuit technology realizes high‐performance analog circuitry and can be combined with buried injector logic to integrate both analog and digital circuitry on the same chip. The combination of these technologies offers cost‐effective system integration for digital terminals.

A high-performance, depletion-load, bipolar-WFET technology is described. The optimization of device and circuit parameters, the ionimplanted depletion-load fabrication process, and the high-speed input and output circuits, which allow direct interface with the τ TL circuit family, are discussed.