As part of a series of wafer bonding experiments, the exfoliation/blistering of ion-implanted Cd 0.96 Zn 0.04 Te substrates was investigated as a function of postimplantation annealing conditions. (211) Cd 0.96 Zn 0.04 Te samples were implanted either with hydrogen (5 ϫ 10 16 cm Ϫ2 ; 40-200 keV) or co-implanted with boron (1 ϫ 10 15 cm Ϫ2 ; 147 keV) and hydrogen (1-5 ϫ 10 16 cm Ϫ2 ; 40 keV) at intended implant temperatures of 253 K or 77 K. Silicon reference samples were simultaneously co-implanted. The change in the implant profile after annealing at low temperatures (Ͻ300°C) was monitored using high-resolution x-ray diffraction, atomic force microscopy (AFM), and optical microscopy. The samples implanted at the higher temperature did not show any evidence of blistering after annealing, although there was evidence of sample heating above 253 K during the implant. The samples implanted at 77 K blistered at temperatures ranging from 150°C to 300°C, depending on the hydrogen implant dose and the presence of the boron co-implant. The production of blisters under different implant and annealing conditions is consistent with nucleation of subsurface defects at lower temperature, followed by blistering/exfoliation at higher temperature. The surface roughness remained comparable to that of the as-implanted sample after the lower temperature anneal sequence, so this defect nucleation step is consistent with a wafer bond annealing step prior to exfoliation. Higher temperature anneals lead to exfoliation of all samples implanted at 77 K, although the blistering temperature (150-300°C) was a strong function of the implant conditions. The exfoliated layer thickness was 330 nm, in good agreement with the projected range. The "optimum" conditions based on our experimental data showed that implanting CdZnTe with H ϩ at 77 K and a dose of 5 ϫ 10 16 /cm 2 is compatible with developing high interfacial energy at the bonded interface during a low-temperature (150°C) anneal followed by layer exfoliation at higher (300°C) temperature.
Hydrogen-exfoliation has become a viable approach to transfer SiC thin layers onto different substrate materials. However, little attention has been paid to the exfoliation-inducing annealing conditions. To investigate the annealing conditions, 4H SiC wafers were implanted with either 2.5×1016 H2 + cm-2 or 5.0×1016 cm-2at 37 KeV. Post-implant, multi-step annealing sequences were examined in order to promote more efficient blistering, and it was found that a low temperature initial annealing step (T ≈ 500°C) can decrease the annealing time necessary in the high temperature regime; this was attributed to a nucleation of hydrogen induced platelet defects during the low temperature annealing regime and efficient splitting during a higher temperature (900 °C) anneal. This process is similar to what is observed for InP and Si exfoliation, except that the annealing processes occur at higher temperature.
We have successfully bonded (211) cadmium zinc telluride (CZT) substrates onto (001) Si substrates for subsequent epitaxial-layer deposition of mercury cadmium telluride device layers. Silicon-nitride intermediate layers were employed as they provide both low surface roughness, which is necessary for bonding, and low absorption in the 1-10-µm range. Prior to bonding, the SiN layers were activated using oxygen plasma. Transmission infrared (IR) imaging showed Ͼ70% bonded area of a 10 mm ϫ 10 mm CdZnTe substrate onto a Si substrate. After the initial bond, the structure was exposed to a low-temperature anneal (150°C) for extended periods of time (22 h) to increase the bond strength. This process was sufficient to produce a CdZnTe on silicon structure that was able to withstand subsequent chemical-mechanical polishing (CMP) of the CZT substrate. We also investigated CMP of the transferred CdZnTe to improve the surface for subsequent epitaxial deposition. A Br/ethylene glycol/methanol solution produced the lowest damage levels, as determined by triple axis x-ray diffraction (TAD) while a standard silica/NaOH treatment produced a surface with Ͻ0.5-nm root mean square (RMS) roughness.
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