In this research, we propose a method that can significantly improve the linearity of current–voltage characteristics (L–IV) of synapse devices. Considering that analog input data are dependent on the L–IV, synapse devices having non-linear current–voltage characteristics can result in drastic conductance variations during inference operations. It means that the L–IV is one of the key parameters in the synapse device. To improve the L–IV, a triode region of a metal oxide semiconductor field effect transistor (MOSFET) was utilized with a Li-ion-based memristor as a gate voltage divider, which results in gradual channel conductance changes (analog synaptic weights). The channel conductance of the MOSFET can be selectively controlled based on Li-ion intercalation and de-intercalation. A notably improved L–IV and analog synaptic weights were achieved, which enhanced the MNIST data set recognition accuracy from 35.8% to 92.03%.

Lately, there has been a rapid increase in the use of software-based deep learning neural networks (S-DNN) for the analysis of unstructured data consumption. For implementation of the S-DNN, synapse-device-based hardware DNN (H-DNN) has been proposed as an alternative to typical Von-Neumann structural computing systems. In the H-DNN, various numerical values such as the synaptic weight, activation function, and etc., have to be realized through electrical device or circuit. Among them, the synaptic weight that should have both positive and negative numerical values needs to be implemented in a simpler way. Because the synaptic weight has been expressed by conductance value of the synapse device, it always has a positive value. Therefore, typically, a pair of synapse devices is required to realize the negative weight values, which leads to additional hardware resources such as more devices, higher power consumption, larger area, and increased circuit complexity. Herein, we propose an alternative simpler method to realize the negative weight (named weight shifter) and its hardware implementation. To demonstrate the weight shifter, we investigated its theoretical, numerical, and circuit-related aspects, following which the H-DNN circuit was successfully implemented on a printed circuit board.

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Vertical three-terminal electrochemical random access memory (ECRAM) is developed to demonstrate the feasibility of high-density integration and mass production. Improved retention was obtained by investigation of role of the electrolyte layer.

For portable and transparent electronic applications, transparent supercapacitor (T-SC) is developed to act as an energy storing device. Because electric and optical characteristics of the supercapacitor are strongly dependent on its thickness, all solid state T-SC was developed based on sensitively controllable fabrication process. We were able to attain an optimum thickness for the T-SC such that it exhibited an excellent transparency as well as capacity. Thus, the transparency-capacity dilemma, that is, the thickness of a T-SC increases with respect to its capacity while it is inversely proportional to its transparency, was solved through our proposed T-SC structure. Consequently, more than 60% transparency and 80% capacitance retention of 1500 charge/discharge cycles were achieved. The overcoming of transparency-capacity dilemma can enhance the T-SC applicability as a core energy storage device.