To enhance the computing efficiency in a neuromorphic architecture, it is important to develop suitable memory devices that can emulate the role of biological synapses. More specifically, not only are multiple conductance states needed to be achieved in the memory but each state is also analogously adjusted by consecutive identical pulses. Recently, electrochemical random-access memory (ECRAM) has been dedicatedly designed to realize the desired synaptic characteristics. Electric-field-driven ion motion through various electrolytes enables the conductance of the ECRAM to be analogously modulated, resulting in a linear and symmetric response. Therefore, the aim of this study is to review recent advances in ECRAM technology from the material and device engineering perspectives. Since controllable mobile ions play an important role in achieving synaptic behavior, the prospect and challenges of ECRAM devices classified according to mobile ion species are discussed.
Lately, there has been a rapid increase in the use of software-based deep learning neural networks (S-DNN) for the analysis of unstructured data consumption. For implementation of the S-DNN, synapse-device-based hardware DNN (H-DNN) has been proposed as an alternative to typical Von-Neumann structural computing systems. In the H-DNN, various numerical values such as the synaptic weight, activation function, and etc., have to be realized through electrical device or circuit. Among them, the synaptic weight that should have both positive and negative numerical values needs to be implemented in a simpler way. Because the synaptic weight has been expressed by conductance value of the synapse device, it always has a positive value. Therefore, typically, a pair of synapse devices is required to realize the negative weight values, which leads to additional hardware resources such as more devices, higher power consumption, larger area, and increased circuit complexity. Herein, we propose an alternative simpler method to realize the negative weight (named weight shifter) and its hardware implementation. To demonstrate the weight shifter, we investigated its theoretical, numerical, and circuit-related aspects, following which the H-DNN circuit was successfully implemented on a printed circuit board.
In this research, we propose a method that can significantly improve the linearity of current–voltage characteristics (L–IV) of synapse devices. Considering that analog input data are dependent on the L–IV, synapse devices having non-linear current–voltage characteristics can result in drastic conductance variations during inference operations. It means that the L–IV is one of the key parameters in the synapse device. To improve the L–IV, a triode region of a metal oxide semiconductor field effect transistor (MOSFET) was utilized with a Li-ion-based memristor as a gate voltage divider, which results in gradual channel conductance changes (analog synaptic weights). The channel conductance of the MOSFET can be selectively controlled based on Li-ion intercalation and de-intercalation. A notably improved L–IV and analog synaptic weights were achieved, which enhanced the MNIST data set recognition accuracy from 35.8% to 92.03%.
Vertical three-terminal electrochemical random access memory (ECRAM) is developed to demonstrate the feasibility of high-density integration and mass production. Improved retention was obtained by investigation of role of the electrolyte layer.
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