Use policyThe full-text may be used and/or reproduced, and given to third parties in any format or medium, without prior permission or charge, for personal research or study, educational, or not-for-pro t purposes provided that:• a full bibliographic reference is made to the original source • a link is made to the metadata record in DRO • the full-text is not changed in any way The full-text must not be sold in any format or medium without the formal permission of the copyright holders.Please consult the full DRO policy for further details.

Use policyThe full-text may be used and/or reproduced, and given to third parties in any format or medium, without prior permission or charge, for personal research or study, educational, or not-for-prot purposes provided that:• a full bibliographic reference is made to the original source • a link is made to the metadata record in DRO • the full-text is not changed in any way The full-text must not be sold in any format or medium without the formal permission of the copyright holders.Please consult the full DRO policy for further details. Top-gated graphene field-effect transistors (GFETs) have been fabricated using bilayer epitaxial graphene grown on the Si-face of 4H-SiC substrates by thermal decomposition of silicon carbide in high vacuum. Graphene films were characterized by Raman spectroscopy, Atomic Force Microscopy, Scanning Tunnelling Microscopy, and Hall measurements to estimate graphene thickness, morphology, and charge transport properties. A 27 nm thick Al 2 O 3 gate dielectric was grown by atomic layer deposition with an e-beam evaporated Al seed layer. Electrical characterization of the GFETs has been performed at operating temperatures up to 100 C limited by deterioration of the gate dielectric performance at higher temperatures. Devices displayed stable operation with the gate oxide dielectric strength exceeding 4.5 MV/cm at 100 C. Significant shifting of the charge neutrality point and an increase of the peak transconductance were observed in the GFETs as the operating temperature was elevated from room temperature to 100 C. V C 2014 AIP Publishing LLC. [http://dx

Multilayer epitaxial graphene has been grown on the Si-face of 6H-SiC on-axis commercial substrates under high vacuum conditions and at growth temperatures up to 1900 °C, utilizing the standard sublimation growth technique and a modified SiC rapid thermal annealing system which allows for excellent control of heating and cooling ramp rates. The peak growth temperature and total growth time during the graphene growth step, along with the temperature of the initial substrate etch step, were all systematically varied in order to ascertain their effect on the formation of epitaxial graphene films on the SiC surface. Modifying the substrate etch temperature was found to have a significant impact on the morphology of the SiC substrate, with a uniform step structure only developing across the surface within a narrow temperature band. Furthermore, changing the values of the peak temperature or the growth time during the growth step were both shown to have a large effect on the resultant materials properties of the graphene films.

Use policyThe full-text may be used and/or reproduced, and given to third parties in any format or medium, without prior permission or charge, for personal research or study, educational, or not-for-prot purposes provided that:• a full bibliographic reference is made to the original source • a link is made to the metadata record in DRO • the full-text is not changed in any way The full-text must not be sold in any format or medium without the formal permission of the copyright holders.Please consult the full DRO policy for further details. Metal contamination deposited on few-layer graphene (3±1 ML) grown on SiC(0001) was successfully removed from the surface, using low cost adhesive tape. More than 99% of deposited silver contamination was removed from the surface via peeling, causing minimal damage to the graphene. A small change in the adhesion of graphene to the SiC(0001) substrate was indicated by changes observed in pleat defects on the surface, however, atomic resolution images show the graphene lattice remains pristine. Thin layers of contamination deposited via an electron gun during AES/LEED measurements were also found to be removable by this technique. This contamination showed similarities to "roughened" graphene previously reported in the literature.

Top-gated field-effect transistors have been created from bilayer epitaxial graphene samples that were grown on SiC substrates by a vacuum sublimation approach. A high-quality dielectric layer of Al2O3was grown by atomic layer deposition to function as the gate oxide, with an e-beam evaporated seed layer utilized to promote uniform growth of Al2O3over the graphene. Electrical characterization has been performed on these devices, and temperature-dependent measurements yielded a rise in the maximum transconductance and a significant shifting of the Dirac point as the operating temperature of the transistors was increased.