In this paper, we present a newly developed 1200-V-class 4H-SiC implantation-and-epitaxial trench metal–oxide–semiconductor field-effect transistor (IETMOSFET). It uses high-quality p- and n-epitaxial layers for a channel and a trench current spreading layer (TCSL), respectively. It can enhance both channel mobility and bulk mobility for current spreading by avoiding damage and impurity variations caused by ion implantation. The ion implantation and epitaxial techniques developed for existing ion-implantation-and-epitaxial MOSFETs (IEMOSFETs) are herein utilized to protect the trench bottom and a relatively low-doped epitaxial channel layer with high mobility. By optimizing the geometry of p-base regions under a gate trench structure, we obtain a low specific on-resistance (R ON A) of 1.8 mΩ cm2 with a breakdown voltage (BVDSS) above 1200 V.

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A breakdown of a conventional trench SiC-MOSFET is caused by oxide breakdown at the bottom of the trench. We have fabricated a novel trench SiC-MOSFET with buried p+ regions and demonstrated the high breakdown voltage of 1700 V and the specific on-resistance of 3.5 mΩcm2.

V-groove trench MOSFETs with the 4H-SiC{0-33-8} face as the trench sidewall for the channel region have been investigated. The on-resistance and breakdown voltage strongly depend on the aperture ratio of the buried p + regions. The VMOSFETs with the buried p + regions of 71% on a 6-inch wafer exhibited a low specific on-resistance of 2.0 m cm 2 with 1200 V blocking voltage. The threshold voltage is 2.3 V at 175 o C, which shows the VMOSFETs have tolerability for an erroneous ignition under high temperature. The switching capability showed low switching losses over DMOSFETs on 4 o off 4H-SiC(0001) face and normal operation under fast switching repetitive test (40 Vns -1 ). The stability of the threshold voltage was demonstrated by HTGB tests. I.978-1-4799-6261-7/15/$31.00 ©2015 IEEE

We have systematically investigated the trench properties of 4H-SiC for p-type channel doping level formed by epitaxial growth, crystallographic plane, and MOS interface treatment. Our results show that the channel mobilities on the (1-100), (11-20), (-1100), and (-1-120) planes gradually decreased in the range from 1 × 1016 to 1 × 1017 cm-3 as the epitaxial channel concentration increased. An inevitable tradeoff existed between channel mobility (field-effect mobility, µFE) and threshold voltage (Vth) in trench MOSFETs. Furthermore, the maximum µFE at a channel concentration of 1 × 1017 cm-3 was 95 cm2·V-1·s-1 on the (11-20) plane with wet + hydrogen (H2) annealing, 83 cm2·V-1·s-1 on the (1-100) plane with wet + H2 annealing and 57 cm2·V-1·s-1 on the (1-100) plane with nitric oxide annealing.