Current collapse is suppressed up to 800 V of drain voltage in our proposed device, Hybrid-Drain-embedded Gate Injection Transistor (HD-GIT), where an additional p-GaN layer is grown on the AlGaN barrier layer and is connected to the drain electrode. We present, based on a device simulation and electroluminescence study, that the hole injection from the additional drain-side p-GaN at the OFF state compensates the hole emission in the epilayer. As a result, the gate-drain access region is not negatively charged at the OFF state, resulting in the drastic suppression of current collapse in HD-GIT.
We have demonstrated the highest RF output power density of 12.88 W/mm, to our knowledge, at 2.14 GHz in GaN high electron mobility transistor on silicon (Si) substrate at high voltage operation. This highest record was achieved by reducing the parasitic loss at the conductive interface layer between the epitaxial structure and the Si substrate, and thinning the Si substrate thickness. The parasitic loss evaluation by a capacitance–voltage method proved to be effective since the epitaxial wafer selection is possible without fabricating RF devices. Si substrate as thin as 60 µm results in good thermal resistance and contributes to the large RF output power density.
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