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Wafer-Level Packaging (WLP) has emerged in modern years and played a prominent role in both semiconductor and Integrated Circuit (IC) field, as well as in Micro-ElectroMechanical Systems (MEMS) applications and fields for their distinguishing operating mechanism and adaptive design variety. In this study, numerous kinds of mature packaging technologies combined with innovation as well as integration of WLP techniques were proposed, including low temperature Wafer to Wafer (W2W) bonding using glass frit, wafer sawing and wafer grinding using novel means, wafer-level wire bonding, wafer-level compound molding, compound grinding, post-grinding etching to alleviate wire extrusion, as well as low temperature passivation processes and metal trace patterning which were implemented in Re-Distribution Layer (RDL) stage. Some of these technologies were specified in the later half paragraphs. Major process flow for our WLP platform for MEMS devices like accelerometers, gyroscope, pressure sensors, and even combo sensors were mentioned as well. In addition to technology elaboration and process depiction, relevant experimental results and final Reliability Analysis (RA) test results on package level have also been demonstrated and discussed. Several obstacles during the development stage, including poor adhesion between molding compound and passivation layer, gold wire surface and metal trace layer, overall warpage increase after thermal process in RDL stage, have been investigated. These challenges as well as our proposed solutions have all been addressed in this paper to exhibit SPIL MEMS WLP platform feasibility.

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