This paper proposes temperature-independent load sensor (LS), optimum width controller (OWC), optimum deadtime controller (ODC), and tri-mode operation to achieve high efficiency over an ultra-wide-load range. Higher power efficiency and wider loading current range require rethinking the control method for DC-DC converters. Therefore, a highly efficient tri-mode DC-DC converter is invented in this paper for system-on-chip (SoC) applications, which is switched to sleeping mode at very light load condition or to high-speed mode at heavy load condition. The efficiency improvement is upgraded by inserting new proposed dithering skip modulation (DSM) between conventional pulse-width modulation (PWM) and pulse-frequency modulation (PFM). In other words, an efficiency-improving DSM operation raises the efficiency drop because of transition from PWM to PFM. Importantly, DSM mode can dynamically skip the number of gate driving pulses, which is inverse proportional to load current. Simplistically and qualitatively stated, the novel load sensor automatically selects optimum modulation method and power MOSFET width to achieve high efficiency over a wide load range. Moreover, optimum power MOSFET turn-on and turn-off delays in synchronous rectifiers and reduced ground bounce can save much switching loss by current-mode dead-time controller. Experimental results show the tri-mode operation can have high efficiency about 90% over a wide load current range from 3 to 500 mA. Owing to the effective mitigation of the switching loss contributed by optimum power MOSFET width and reduction of conduction loss contributed by optimum dead-times, the novel width and dead-time controllers achieve high efficiency about 95% at heavy load condition and maintain the highly efficient performance to very light load current about 0.1 mA.

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A fast-transient dc-dc converter with on-chip compensated error amplifier is presented in this paper. The error amplifier uses three transistors and one voltage follower to implement the on-chip current-mode Miller capacitor. Not only on-chip compensated error amplifier is implemented without off-chip components and I/O pins, but also fast-transient response is achieved. Moreover, we accurately decrease the transient response time without suffering from the oscillation issue. Implemented in a 0.35-m CMOS process, experimental results demonstrate the stability of converters with a little area overhead about 5% larger than that of conventional design. In case of load variations, there is about four times reduction on the dropout voltage compared to that of conventional design. Furthermore, transient speed by our proposed technique is about five times faster than that of conventional control, while the total quiescent current is only increased about 3%.

We present a theoretical study of the spin-dependent scattering of electrons from screened impurities in III-V semiconductor quantum wells. Our calculation is based on the effective one-electronic-band Hamiltonian and the spin-orbit coupling with the Coulombic potential of the impurities. We demonstrate that the spin-orbit interaction can lead to recognizable magnitudes of spin asymmetry in the elastic-scattering cross section. Fairly large values of the Sherman function ͑about 0.01͒ are obtained for repulsive and attractive impurities in quantum wells of narrow gap semiconductors.

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