In this paper, test input vectors for ISCAS-85 benchmark circuits are derived, with which single faults of each signal line in the lTL combinational circuits can be detected by their quiescent supply currents. Also, they are compared with the vectors for fault detection methods based on the primary output logic values. It is shown that by detecting faults with supply currents of T7z circuits, smaller size of test inputs can be derived for most of the circuits than fault detection methods based on the primary output logic values, and ako, if both the output logic values and the supply current are used for detecting faults, the number of the test inputs can be reduced.

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Bipolar logic circuits are indispensable for implementing high-speed logic circuits. Since quiescent supply current flows into the circuits without faults, they can not be tested by a conventional IDDQ test method. We proposed a quiescent supply current test method which is applicable for the bipolar circuit tests, and examined the testability of open faults under an ideal assumption that there are not any process variations. Actually, there are some variations in the quiescent supply current of each gate in implemented logic circuits. Thus, It is necessary to examine the practical testability of the test method before applying to production tests of bipolar logic ICs. In this paper, the practical testability obtained under an assumption that there are some unitto-unit variations of supply current among gates is examined for ISCAS-85 benchmark circuits. The experimental results show that larger fault coverage can be obtained with a smaller number of test input vectors by our supply current test method than the functional test one based on stuck-at fault models.

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