In this paper, we proposed two baluns, a compact balun and a compact balun with imbalance compensation; both are implemented using the one-poly six-metal (1P6M) 0.18 µm CMOS process. Both baluns have good performance from 4 to 10 GHz, and consume less silicon area due to their compact structure. The self-resonant frequency is increased by properly selecting metal layer for each spiral winding. The compact balun has a magnitude imbalance of 1 dB and a phase imbalance of 4.6 degree from 4 to 10 GHz. With the imbalance compensation, the balun has a magnitude imbalance of 0.6 dB and a phase imbalance of 1.1 degree from 4-10 GHz. Much better results have been achieved for the compact balun with our proposed imbalance compensation method. Both baluns can be used to perform both single-ended/differential and differential/single-ended conversions in different configurations.

also affected. Equation (10) shows that only the imaginary part of changes sign, if the signs of the real parts of both the permittivity and the permeability are altered.Suppose two ICMs labeled p and q possess identical response properties at a certain frequency-except that 0

An improved linear full-rate CMOS 10 Gb/s phase detector is proposed. The improved phase detector overcomes the difficulties in realizing the full-rate operation by adding an I/Q splitter for the input data. Such a topology enlarges the pulse width of output signals to ease the full clock rate operation and the problem of the half period skew in the whole clock data recovery system. The proposed topology is able to provide a good linearity over a wider operating range of input phase offset compared to that of existing designs. The phase detector using the Chartered 0.18 µm CMOS process is capable of operating up to a 10 GHz clock rate and 10 Gb/s input data for a 1.8 V supply voltage with 31 mW power consumption.

This letter describes a new approach to maximize the quality (Q) factor of a spiral inductor without any modifications to the existing CMOS or BiCMOS processes. The proposed method is based on successively increasing the metal width from the inner to the outer turns of the spiral inductor. This method has been used to realize an optimized inductor for RF applications. The comparative evaluation shows that the optimized inductor outperforms four other spiral inductors with fixed metal widths of 10, 15, 20, and 25 μ in terms of the Q‐factor without sacrificing the inductance and chip area. © 2000 John Wiley & Sons, Inc. Microwave Opt Technol Lett 26: 39–41, 2000.

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