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The Cn metal interconnect under TLP stress can not be treated as the constant current stress. The increase in the metal interconnect length at GGNMOS drain can improve device's MM failure threshold but degrade device's HBM failure threshold and IT2. INTRODUCTIONThis paper presents the influence of the Cu metal intCKOMec1 length and width on device ESD performance and the dynamic thermal behavior of interconnect nnder the TLP stress. The stress using the TLP system is usually

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Transmission Line Pulse (TLP) measurement has been shown to correlate well to ESD performance in most cases. However, some recent researches suggested in some cases miscorrelation can happen. A test chip was designed and fabricated in TSMC 0.13um technology to test this correlation. We found that in some conditions, TLP measurements (IT2) do not correlate well with ESD testing in both Human Body and Machine Models.