This paper introduces SiQAD, a computer-aided design tool enabling the rapid design and simulation of atomic silicon dangling bond quantum dot patterns capable of computational logic. Several simulation tools are included, each able to inform the designer on various aspects of their designs: a ground-state electron configuration finder, a non-equilibrium electron dynamics simulator, and an electric potential landscape solver with clocking electrode support. Simulations have been compared against past experimental results to inform the electron population estimation and dynamic behavior. New logic gates suitable for this platform have been designed and simulated, and a clocked wire has been demonstrated. This work paves the way for the exploration of the vast and fertile design space of atomic silicon dangling bond quantum dot circuits.

Using a non-contact atomic force microscope we track and manipulate the position of single electrons confined to atomic structures engineered from silicon dangling bonds (DBs) on the hydrogen terminated silicon surface. By varying the probe-sample separation we mechanically manipulate the equilibrium position of individual surface silicon atoms and use this to directly switch the charge state of individual DBs. Because this mechanism is based on short range interactions and can be performed without applied bias voltage, we maintain both site-specific selectivity and single-electron control. We extract the short range forces involved with this mechanism by subtracting the long range forces acquired on a dimer vacancy site. As a result of relaxation of the silicon lattice to accommodate negatively charged DBs we observe charge configurations of DB structures that remain stable for many seconds at 4.5 K. Subsequently we use charge manipulation to directly prepare the ground state and metastable charge configurations of DB structures composed of up to six atoms.

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Ultimate bounds on the maximum operating frequency of networks of quantum dot cellular automata devices have yet to be established. We consider the adiabaticity of such networks in the two-state approximation where clocking is achieved via modulation of the inter-dot tunneling barriers. Estimates of the maximum operating frequency that would allow a 99% probability of observing the correct logical output are presented for a subset of the basic components used in QCA network design. Simulations are performed both in the coherent limit and for a simple dissipative model. We approach the problem of tunnel-based clocking from the perspective of quantum annealing, and present an improved clocking schedule allowing for faster operation. Using an analytical solution for driven QCA wires, we show that the maximum operating frequency in the coherent limit falls off with the square of the wire length, potentially limiting the size of clocked regions.

The behavior of quantum-dot cellular automata (QCA) networks is typically understood through considering polarization-like interactions with energies arising from the agreement or disagreement of the defined polarization states of neighboring QCA devices. It is known that additional interactions are present in 3-state molecular QCA that alter the required clocking fields needed for a device operation. Recent efforts in implementing logic gates using patterned dangling bonds (SiDBs) on hydrogen passivated silicon reveal significant challenges arising from similar effects. The necessary applied electrical potential needed to increase the population of an SiDB is strongly dependent on the current population of its neighbors, an effect we term congestion. It is unclear whether the strength of these interactions may pose an obstacle for future applications of SiDBs as a nanoscale QCA architecture. In this work, we investigate 3-state QCA in the regime in which congestion is significant and determine the extent to which such effects can be mitigated for SiDB devices. We propose that while SiDB-based QCA wires may be achievable depending on limitations of inter-dot tunneling, higher density devices such as majority gates may need to be replaced by more architecture specific implementations unless net-neutral variants of SiDB QCA devices can be demonstrated.