This article presents microelectromechanical system (MEMS) ground-signal-ground (GSG) probes based on silicon-on-insulator (SOI) technology for on-wafer microwave characterization of radio-frequency (RF) microelectronics. The probe is designed using optimized coplanar waveguide structures with the aim of ensuring a low-contact resistance between the probe and the pads of the device under test (DUT). The probes are batch fabricated using SOI substrates and employ a simple silicon micromachining process. The probes have a pitch of 4.5 µm with miniaturized dimensions for a DUT pad area with a similar size. Electrical (dc) measurements show that the fabricated probe has a low-contact resistance (~0.02 Ω) on gold pads. Excellent extracted RF performances of the probe are observed up to 30 GHz, showing an insertion loss better than 2.2 dB and return loss better than 20 dB over the frequency range. An ageing study shows the probes are capable of forming this dc contact for over 6000 contact cycles. The preliminary result of the repeatability of on-wafer one-port measurements with the miniaturized probe shows a consistent RF performance maintained through several contacts. The data indicates that the proposed MEMS probe is suitable for the high-frequency characterization of integrated nanoscale devices having reduced pad dimensions.
Miniaturized, microfabricated microelectromechanical systems (MEMS)-based wafer probes are used here to evaluate different contact pad metallization at low tip forces (<mN) and low skate on the on-wafer pads. The target application is low force RF probes for on-wafer measurements which cause minimal damage to both probes and pads. Low force enables the use of softer, more conductive metallisation. We have studied four different thin film contact pad metals based on their thin film electrical resistivity and micro-hardness: gold, nickel, molybdenum, and chromium. The contact pads sizes were micrometre (1.9×1.9 µm2) and sub-micrometre (0.6×0.6 µm2). The contact resistance of Au-Au, Ni-Au, Mo-Au, and Cr-Au was measured as a function of tip deflection. The tip force (loading) of the contacts was evaluated from the deflection of the cantilever. It was observed that an overtravel of 300 nm resulting in a contact force of ~400 µN was sufficient to achieve a contact resistance <1 Ω for a sub-micrometre gold contact pad. Our results are compared with an analytical model of contact resistance in loaded metal-metal contacts—a reasonable fit was found. A larger contact resistance was observed for the other metals—but their hardness may be advantageous when probing other materials. Using a combination of a rigid silicon cantilever (>1000 Nm-1) and small contact pads enabled us to show that it is the length of the pad (in contact with the surface) which determines the contact resistivity rather than the total contact pad area.
Attenuation has been studied in different-sized coplanar waveguide (CPW) patterned onto silicon-oninsulator (SOI) for three different surfaces between the CPW tracks: silicon dioxide/silicon interface, a hydrogen-terminated silicon surface, and a native oxide. For large-gap CPW (signal track width = 100 µm, gap width = 63.5 µm), selective removal of the silicon dioxide from between the metal tracks reduces losses from 0.79 dB mm -1 to 0.69 dB mm -1 at 50 GHz. The subsequent growth of a native oxide on the silicon surface between the tracks results in losses equal to 0.67 dB mm -1 . For small-gap CPW ( = 2 µm, = 2.5 µm), losses are reduced from 5.6 dB mm -1 to 3.4 dB mm -1 at 50 GHz by selectively removing the silicon oxide between the metal tracks. However, when a native oxide is allowed to grow on the silicon surface between the tracks, the losses increase significantly to 5.8 dB mm -1 . When the native oxide is removed, the losses decrease to those observed following removal of the silicon dioxide. The measurements suggest that the contribution of the intertrack surface losses is the result of free-carrier losses due to a surface inversion layer. The surface-associated losses are proportionally larger as the CPW dimensions shrink-as predicted by modelling. We suggest that technologies employing miniature CPW should take this into account. The native oxide should be routinely removed if possible-implying that 2 appropriate chemically-resistant metallisation be chosen, or fabrication processes should incorporate stable passivation of silicon surfaces between CPW tracks to avoid native oxide growth. Conversely, the increased sensitivity of attenuation to surface effects by shrinking CPW dimensions suggests that CPWbased sensors could benefit from miniaturization.
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