Using hydrodynamic focusing, we encapsulated polystyrene ellipsoidal particles in water droplets dispersed in an immiscible, continuous phase of light mineral oil. The axisymmetric shape of the drop partially encapsulating an elongated particle was computed as a function of the particle aspect ratio, droplet volume, and contact angle. When the droplet volume is within a certain range, pinned (partially engulfed) and fully engulfed equilibrium configurations coexist. Partial encapsulation may be preferred (has a lower free energy) even when the droplet's volume is sufficient to fully engulf the particle. The co-existence of multiple equilibrium states suggests possible hysteretic encapsulation behavior. We also estimate the axial capillary force exerted by the droplet on the particle as a function of volume and contact angle. The theoretical predictions are critically compared with experimental observations.

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This paper describes gate oxide defect localization and analysis using passive voltage contrast (PVC) and conductive atomic force microscopy (C-AFM) in a real product through two case studies. In this paper, 10% wt KOH was used to etch poly-Si and expose gate oxide. In the case studies, different types of gate oxide defects will cause different leakage paths. According to the I-V curve measured by C-AFM, we can distinguish between short mode and gate oxide related leakage. For gate oxide leakage, KOH wet etching was successfully used to identify the gate oxide pinholes.

This paper will demonstrate a new copper (Cu) electroplating technique [1] for accurately isolating high resistance fault locations with resistance below K-order ohms. This phenomenon is achieved by having different electric field intensity leading to different copper deposition rate on the sample surface. From experiments, the interface between the thicker electroplated and thinner electroplated copper layer on the sample surface accurately indicates the high resistance fault location. Also, Optical Microscope (OM) and Focused Ion Beam (FIB) are used to inspect the localized fault site of the electroplated sample. Furthermore, this technique, Electro-Plating Localization Method (EPLM), can process several samples or the entire wafer at the same time. In addition, this technique can be applied in the fully open cases of test vehicles with logical circuit as voltage contrast localization method.

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