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We present a SiC Trench JFET technology that achieves a record setting specific on-resistance (RDSA) of 0.75mohm.cm2. These SiC devices are combined with optimized low voltage MOSFETs to form co-packaged cascode transistors, which provide unprecedented performance benefits, with a clear path to direct cost parity with silicon superjunction devices. These devices are shown to be useful for all circuit topologies..

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caused by a flow from high pressure to low pressure. This nonzero vertical velocity or "blowing" results in an increase in the momentum thicknesses just ahead of the row, in accordance with equations (21a) and (b). The volume flow, Q, is empirically related to the pressure rise, Ap, through the seal coefficient K* (Fig. 3). The additional loss caused by the windage of the shrouds is given by ^V l2) = ^(rpU s C f *L) H (22) where Cf* is a skin friction coefficient characteristic of the flow in the shrouds and L is the wetted length of which C/* acts.

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