Bottom-contact n-channel C60 thin-film transistors (TFTs) with drain/source electrodes modified by benzenethiol derivatives have been fabricated to investigate the influence of the modification on the transistor characteristics. Modification using methylbenzenethiol, aminobenzenethiol, and (dimethylamino)benzenethiol having electron-donating groups causes threshold voltages to shift to low voltages. In addition, the modification provides no significant decrease in saturation mobilities. A C60 TFT with (dimethylamino)benzenethiol-modified electrodes has a low threshold voltage of 5.1 V as compared to that of 16.8 V for a TFT with nonmodified electrodes. The threshold-voltage shift is probably because the modification reduces electron-injection barrier height and improves electron injection into organic semiconductors.
Fullerene C60 thin-film transistors (TFTs) with bottom-contact structure have been fabricated. The parasitic resistance was extracted using gated-transmission line method. The drain/source electrodes consisted of a single Au layer with no adhesion layer; the channel lengths ranged from 5 to 40 μm. The field-effect mobilities in the saturation regime slightly depended on the channel length, ranging from 2.45 to 3.23 cm2/V s. The mobility of 3.23 cm2/V s was obtained from the TFT with a channel length of 5 μm and is the highest in organic TFTs with bottom-contact structure. The high mobility is due to the low parasitic resistance.
A critical issue in GaN-based high power light-emitting diodes (LEDs) is how to suppress the efficiency droop problem occurred at high current injection while improving overall quantum efficiency, especially in conventional c-plane InGaN/GaN quantum well (QW), without using complicated bandgap engineering or unconventional materials and structures. Although increasing thickness of each QW may decrease carrier density in QWs, formation of additional strain and defects as well as increased built-in field effect due to enlarged QW thickness are unavoidable. Here, we propose a facile and effective method for not only reducing efficiency droop but also improving quantum efficiency by utilizing c-plane InGaN/GaN QWs having thinner barriers and increased QW number while keeping the same single well thickness and total active layer thickness. As the barrier thickness decreases and the QW number increases, both internal electric field and carrier density within QWs are simultaneously reduced without degradation of material quality. Furthermore, we found overall improved efficiency and reduced efficiency droop, which was attributed to the decrease of the built-in field and to less influence by non-radiative recombination processes at high carrier density. This simple and effective approach can be extended further for high power ultraviolet, green, and red LEDs.
We fabricated two-input NAND gates composed of p-channel pentacene and n-channel C60 transistors. The logic devices were prepared on flexible polymer substrates through a shadow mask process. Correct NAND logic functionality was demonstrated at a wide voltage range of 2–7 V. From voltage transfer characteristics of the NAND gates, we obtained impressive signal gains up to 120 and large noise margins in the given voltage range.
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