A new Schottky barrier (SB) nonvolatile nanowire memory is reported experimentally with efficient low-voltage programming and erasing. By applying an SB source/drain to enhance the electrical field in the silicon gate-all-around nanowire, the nonvolatile silicon-oxide-nitride-oxide-silicon (SONOS) memory can operate at gate voltages of 5 to 7 V for programming and −7 to −9 V for erasing through Fowler-Nordheim tunneling. The larger the gate voltage is, the faster the programming/erasing speed and the wider the threshold-voltage shift are attained. Importantly, the SB nanowire SONOS cells exhibit superior 100-K cycling endurance and high-temperature retention without any damages from metallic silicidation process or field-enhanced tunneling.Index Terms-Gate-all-around nanowire, Schottky barrier (SB), silicon-oxide-nitride-oxide-silicon (SONOS) memory.

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This work numerically elucidates the effects of dopantsegregated layers on the cell window in multi-bit Schottky barrier charge-trapping cells. Successive injection-trapping iteration analysis was performed to properly study the coupling of trapped charges and Schottky barrier lowering during cell programming. The results showed the dopant-segregated profiles have a key function in determining the programming cell window as well as the physical injection mechanism in multi-bit/cell Schottky barrier charge-trapping cells using the forward and reverse reading scheme.