Due to the high process temperature required for fusion bonding (e.g. ~1000°C) this process was not attractive for 3D applications. In the recent years low temperature fusion bonding processes were developed for addressing low temperature applications. A low temperature CMOS compatible fusion bonding process based on plasma activation of the substrate surfaces prior bonding was developed. The low temperature fusion bonding process was used in combination with standard thin wafer manufacturing processes in order to enable and demonstrate thin layer wafer bonding with subsequent multi-layer stacking capability. The process is compatible with the high cleanliness levels required by CMOS technology and can be used for various application scenarios involving through-silicon vias (TSV) technology.

Thin wafer processing is a critical technology for TSV manufacturing and 3D integration. Thin wafer processing allows to reduce the aspect ratio of the vias, thereby reducing the total processing cost and enables ultra-thin packages for handheld applications. Temporary bonding to a rigid support carrier and debonding after backside processing have been used for thin wafer handling/processing for many years. However, so far all the debonding methods imposed severe limitations on the manufacturability. For light induced debonding the carrier had to be transparent and for solvent based debonding the carrier had to be perforated. For thermally induced debonding, “slide-off debonding” the debonding temperature had to be below the reflow temperature of the solder bumps, which limited the maximal process temperature of the adhesive. In this paper we describe a new debonding method at room temperature. This new technology decouples the debonding process from the adhesive properties, which creates a de facto material independent debonding standard. As the debonding process does not rely on the adhesive properties a major boundary for adhesive engineering has been removed. The debonding method is compatible with bumps or pillars in the bond interface as well as on the backside of the wafer stack. No force is applied on the bumps during debonding which results in very high yields.

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Temporary bonding is a ley process for almost any 3D integration scheme. It offers not only more stability during the thinning process but also allows handling for backside processing of thin wafers like interposers during subsequent process steps [1–2]. Although the temporary bonding technology is already used in high volume manufacturing and has proven high yield process, nevertheless, some limitation appears for some specific applications [3-4-5]. One critical failure origin is delamination, which can lead to wafer breakage and therefore yield loss. This separation of the device wafer and the carrier wafer typically occurs when the temporary bonded wafer stack (device wafer, carrier wafer and temporary bonding adhesive in between) experiences further processing done under high temperature and low vacuum like PECVD deposition. Further insight into processing parameters and a better understanding of the key contributing factors as well as its dependencies help to prevent this failure. To investigate the root cause of the delamination, thermoplastic materials, which are widely used for temporary bonding and debonding applications have been used as temporary bonding adhesives in this work. Different process parameters were investigated individually but also in combination to find the origin of the delamination. These parameters include post thinning annealing temperature, which was varied up to 370C, vacuum level, thermal gradient, bow and warp and intrinsic stress of the thin device wafer. After evaluation of the main parameters affecting the delamination appearance, two extreme cases were experimented in order to check the hypothesis. The first one exhibits delaminations even using a very soft processing conditions for a temporary bonding integration and the second case is able to withstand extreme processing conditions like high temperature up to 370C under vacuum of about 1mbar without delamination appearance. In addition, during this work, the mechanical coupling existing between the carrier and the device wafer thanks to the adhesive has been investigated. Here, a thermoplastic material was used in a temporary bonded structures using wafers with different coefficients of thermal expansion (CTE). During thermal treatment, this CTE difference induce important internal stress bow of the wafer stack. The temperature dependence of the mechanical coupling is monitored during the annealing. A mechanical decoupling between the two wafers occurs when above the polymer glass transition temperature. As a result, the rheology of the thermoplastic layer is found as a contributor to the delamination mechanism. Critical combinations of process parameters in temporary bonding process are then clearly identified and will be presented in this work.