Embedded passives provide a practical solution to microelectronics miniaturization. In a typical circuit, over 80 percent of the electronic components are passives such as resistors, inductors, and capacitors that could take up to 50 percent of the entire printed circuit board area. By integrating passive components within the substrate, embedded passives reduce the system real estate, eliminate the need for discrete components and assembly of same, enhance electrical performance and reliability, and potentially reduce the overall cost. Moreover, it is lead free. Even with these advantages, embedded passive technology is at a relatively immature stage and more characterization and optimization are needed for practical applications leading to its commercialization. This paper presents an entire process from design and fabrication to electrical characterization and reliability test of embedded passives on multilayered microvia organic substrate. Two test vehicles focusing on resistors and capacitors have been designed and fabricated by Packaging Research Center (PRC) and Endicott Interconnect Technologies (EI). Resistors are carbon ink based Polymer Thick Film (PTF) andNiCrAlSi, and capacitors are made with polymer/ceramic nanocomposite material. High frequency measurement of these capacitors was performed. Furthermore, reliability assessments of thermal shock and temperature humidity tests based on JEDEC standards are presented.

One of the foremost design considerations in microelectronics miniaturization is the use of embedded passives which provide practical solution. In a typical circuit, over 80 percent of the electronic components are passives such as resistors, inductors, and capacitors that could take up to almost 50 percent of the entire printed circuit board area. By integrating passive components within the substrate instead of being on the surface, embedded passives reduce the system real estate, eliminate the need for discrete and assembly, enhance electrical performance and reliability, and potentially reduce the overall cost. Moreover, it is lead free. Even with these advantages, embedded passive technology is at a relatively immature stage and more characterization and optimization are needed for practical applications leading to its commercialization. This paper presents an entire process from design and fabrication to electrical characterization and reliability test of embedded passives on multilayered microvia organic substrate.Two test vehicles focusing on resistors and capacitors have been designed and fabricated. Embedded capacitors in this study are made with polymer/ceramic nanocomposite (BaTiO 3 ) material to take advantage of low processing temperature of polymers and relatively high dielectric constant of ceramics and the values of these capacitors range from 50 pF to 1.5 nF with capacitance per area of approximately 1.5 nF/cm 2 . Limited high frequency measurement of these capacitors was performed. Furthermore, reliability assessments of thermal shock and temperature humidity tests based on JEDEC standards were carried out. Resistors used in this work have been of three types: 1) carbon ink based polymer thick film (PTF), 2) resistor foils with known sheet resistivities which are laminated to printed wiring board (PWB) during a sequential build-up (SBU) process and 3) thin-film resistor plating by electroless method. Realization of embedded resistors on conventional board-level high-loss epoxy (~0.015 at 1 GHz) and proposed low-loss BCB dielectric (~0.0008 at > 40 GHz) has been explored in this study. Ni-P and Ni-W-P alloys were plated using conventional electroless plating, and NiCr and NiCrAlSi foils were used for the foil transfer process. For the first time, Benzocyclobutene (BCB) has been proposed as a board level dielectric for advanced System-on-Package (SOP) module primarily due to its attractive low-loss (for RF application) and thin film (for high density wiring) properties.Although embedded passives are more reliable by eliminating solder joint interconnects, they also introduce other concerns such as cracks, delamination and component instability. More layers may be needed to accommodate the embedded passives, and various materials within the substrate may cause significant thermo-mechanical stress due to coefficient of thermal expansion (CTE) mismatch. In this work, numerical models of embedded capacitors have been developed to qualitatively examine the effects of process conditions and electrical ...

With the dramatic advances made in Microsystems industry, System-on-a-Package (SOP) technology holds promise in terms of reduction in size, cost, and improved performance. To be able to achieve such benefits in an integrated system, it is necessary not to compromise the overall reliability of the system. Therefore, the SOP technology will require up-front system-level design-for-reliability approaches and appropriate reliability assessment methodologies to ensure the reliability of digital, optical, and RF functions as well as their interfaces.Design-for-reliability requires (i) Mechanics-based reliability prediction models for various failure mechanisms associated with Digital, Optical, and RF Functions, and their interfaces in the system (ii) Design optimization models for the selection of suitable materials and processing conditions, for reliability as well as functionality and (iii) System-level reliability models understanding the component and functional interaction. This presentation will focus on the reliability assessment of digital, optical, and RF functions in SOP-based microsystems [1].Upfront physics-based design-for-reliability models for various functional failure mechanisms are presented to evaluate various design options and material selection even before the prototypes are made. Advanced modeling methodologies and algorithms to accommodate material length scale effects, due to enhanced system integration and miniaturization are presented. System-level mixed-signal reliability is discussed thorough system-level reliability metrics relating component level failure mechanisms to system-level signal integrity as well as statistical aspects.

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