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A self-aligned process for InP/InGaAs HBTs using T-shaped emitter electrodes has been developed. Using this process, the difference in spacing bemeen the emitter mesa and the base electrode, due to the emitter orientations, can be minimized. The process also reduces differences in characteristics of the IiBTs. 0 1996 John Wiley & Sons, Inc. INTRODUCTIONThe InP-based heterojunction bipolar transistor (HBT) has great potential due to the high electron mobility of InGaAs in the base and the high electron velocity in the collector. These are caused by the large energy gap in the valley between I? and L [l]. The very high potential of the high cutoff frequency and high-speed circuit operation has already been demonstrated by many researchers [2-81. To obtain high performance, especially for low base resistance, a selfaligned process to bring the base electrode close to the emitter region is very important. In conventional self-aligned InP/InGaAs HBTs, the spacing between the emitter mesa and the base ohmic contact is formed by side etching of the emitter using a wet etch [6]. This wet etching process has good selectivity between InP and InGaAs. The shape of the emitter mesa, however, depends on the crystal plane orientations. The characteristics of HBTs are affected by whether the emitter electrode orientation is parallel or perpendicular to the orientation flat. The wet etching process has an another problem: It does not form an undercut in the (1171, (111) InP planes. So, in the conventional process, side etching has to be controlled by ctching of the InGaAs emitter cap.Recently, an article reporting that this process could be done by ECR dry etching was published [7]. All of these processes still have a limit though, in the minimum thickness of the emitter cap and emitter layers, because the total thickness must be thicker than the base metal to avoid shorting between the emitter and the base electrodes. The proposed process, using a T-shaped emitter electrode, offers better control when forming the desired spacing around the emitter mesa. This is because the undercut of the emitter electrode is not affected by isotropic side etching, unlike the conventional emitter etching process. It also avoids the minimum limit on the epitaxial layer thickness by optimizing the thickness of the lower emitter electrode metal. THE PROPOSED STRUCTURE AND THE PROCESS OF InP1InGaAs HBT A schematic of the InP/InGaAs HBT fabrication process is shown in Figure 1. Figure l(d) shows the proposed structure using a T-shaped emitter electrode. This electrode is made of two different metals that are selected because of their different etching rates. In our HBTs, the bottom metal is WSi, which was selected because of its high etching rate against RIE compared to W, the upper metal. These metals were also selected because they are not etched by the semiconductor etch and are very stable at high temperatures. The selectivity of W is more than 10 times that of WSi, so only WSi is etched toward the inside during overetching. The T shap...

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Articles you may be interested inHigh stability heterojunction bipolar transistors with carbondoped base grown by atomic layer chemical beam epitaxy J.It is known that high n ϩ doping in the cap layers of heterojunction bipolar transistor structures induces anomalous Zn diffusion in the base region during metalorganic vapor phase epitaxial growth. This phenomenon has been explained in terms of nonequilibrium group III interstitials generated in the n ϩ cap layer, which create highly diffusive Zn interstitials via the kick-out mechanism. In this article, we show that low-temperature growth ͑550°C͒ is effective in alleviating the influence of the n ϩ cap layer. Due to a large time constant for the recovery of thermal point-defect equilibrium, the last-to-grow n ϩ cap layer cannot inject the excessive group III interstitials into the base region within a growth sequence. Under the low-temperature growth, however, the first-to-grow n ϩ subcollector produces group III interstitials during the whole growth sequence and thereby causes anomalous Zn diffusion. To prevent this effect, we propose interrupting the growth for a long time period ͑30 min͒ before growing the base layer, and growing the n ϩ subcollector at a higher temperature ͑600°C͒. These growth techniques are shown to be effective in purging the subcollector of the undesirable group III interstitials before base-layer formation.

InP/InGaAs double-heterostructure bipolar transistors (DHBTs), incorporating a new collector structure featuring ‘‘pn pair doping’’ in the heterointerface vicinity, have been fabricated using a low-pressure metalorganic chemical vapor deposition (MOCVD) method. These transistors provide high collector current densities over 1×105 A/cm2, indicating the successful suppression of current blocking. S-parameter measurements determine the high current gain cutoff frequencies of 130 GHz. These values favorably compare with those of conventional InGaAs-collector HBTs fabricated for comparison, suggesting that the InP collectors have excellent electron transport properties.