A methodology is proposed to characterize the electrical performance of model-based dummy feature insertion in Cu interconnect. Two types of test structures were designed to explore the electrical performance discrepancy between the rule-based and model-based dummy feature insertion. The sheet resistance dependency on design rule is characterized at the various density conditions. 2-D field solver extracts the parasitic capacitance caused by dummy feature insertion A model-based dummy feature insertion algorithm using randomized shapes is proposed to assist the uniformity control of Cu CMP and MITBEMATECH 854 AZ test vehicle is used to demonstrate the feasibility of the proposed algorithm.

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The dependency of Cu interconnects barrier metal liner integrity due to neighboring pattern density is presented in this paper. It was found that TaN/Ta bi-layer barrier metal liner on isolated Cu interconnects was oxidized through electrical test and failure analysis. An elaborate study on the neighboring interconnects pattern density as well as process solutions were explored to investigate the impacts on the metal liner. Hypotheses were discussed. Results showed that there is an obvious pattern density correlation with the integrity of the metal liner. A comprehensive methodology was devised to check the process window of the metal liner process. The deduction is care needs to be taken in the design of interconnects circuitry. While metal liner process can be optimized, a balance is needed to ensure a robust and reliable barrier metal with neighboring interconnects pattern density.