Two types of 4H-silicon carbide (SiC) MOSFETs are proposed in this paper. One is the novel designed V-groove trench MOSFET that utilizes the 4H-SiC (0-33-8) face for the channel region. The MOS interface using this face shows the extremely low interface state density (D it ) of 3 × 10 11 cm −2 eV −1 , which causes the high channel mobility of 80 cm 2 V −1 s −1 results in very low channel resistance. The buried p + regions located close to the trench bottom can effectively alleviate the electric field crowding without the significant sacrifice of the increase of the resistance. The low specific ON-state resistance of 3.5 m cm 2 with sufficiently high blocking voltage of 1700 V is obtained. The other is the double implanted MOSFET with the carefully designed junction termination extension and field-limiting rings for the edge termination region, and the additional doping into the junction FET region. With a high-quality and high-uniformity epitaxial layer, 6 mm × 6 mm devices are fabricated. The well balanced specific ON-state resistance of 14.2 m cm 2 and the blocking voltage of 3850 V are obtained for 3300 V application. Index Terms-(0-33-8) face, 4H-silicon carbide (SiC), buried p + region, channel mobility, field-limiting ring (FLR), junction FET (JFET), junction termination extension (JTE), MOSFET, V-groove trench.Yasuki Mikamura received the B.E. and M.E. degrees in electrical engineering from Kyoto University, Kyoto, Japan, in 1983 and 1985, respectively.

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A breakdown of a conventional trench SiC-MOSFET is caused by oxide breakdown at the bottom of the trench. We have fabricated a novel trench SiC-MOSFET with buried p+ regions and demonstrated the high breakdown voltage of 1700 V and the specific on-resistance of 3.5 mΩcm2.

V-groove trench MOSFETs with the 4H-SiC{0-33-8} face as the trench sidewall for the channel region have been investigated. The on-resistance and breakdown voltage strongly depend on the aperture ratio of the buried p + regions. The VMOSFETs with the buried p + regions of 71% on a 6-inch wafer exhibited a low specific on-resistance of 2.0 m cm 2 with 1200 V blocking voltage. The threshold voltage is 2.3 V at 175 o C, which shows the VMOSFETs have tolerability for an erroneous ignition under high temperature. The switching capability showed low switching losses over DMOSFETs on 4 o off 4H-SiC(0001) face and normal operation under fast switching repetitive test (40 Vns -1 ). The stability of the threshold voltage was demonstrated by HTGB tests. I.978-1-4799-6261-7/15/$31.00 ©2015 IEEE

We have succeeded in employing nanoimprint lithography (NIL) to form the diffraction gratings of distributed feedback laser diodes (DFB LDs) used in optical communication. Uniform gratings and phase-shifted gratings with periods of 232 nm have been formed by using a reversal-tone NIL with a step-and-repeat imprint tool. Line edge roughness has been sufficiently low with the fabricated gratings. DFB LDs fabricated by NIL have indicated comparable characteristics with LDs fabricated by electron beam lithography. We have also demonstrated that phase-shifted DFB LDs show better uniformity in characteristics than uniform-grating DFB LDs. The results of this study indicate that NIL has high potential for the fabrication of DFB LDs.