This paper describes an electrocardiograph (ECG) monitoring SoC using a non-volatile MCU (NVMCU) and a noise tolerant instantaneous heart rate (IHR) monitor. The novelty of this work is the combination of the non-volatile MCU for normally-off computing and a noise-tolerant-QRS (heart beat) detection algorithm to achieve both low-power and noise tolerance. To minimize the stand-by current of MCU, a nonvolatile flip-flop and a 6T-4C NVRAM are employed. Proposed plate-line charge-share and bit-line non-precharge techniques also contribute to mitigate the active power overhead of 6T-4C NVRAM. The proposed accurate heart beat detector employs a coarse-fine autocorrelation and a template matching technique. Accurate heart beat detection also contributes system level power reduction because the active ratio of ADC and digital block can be reduced using a heart beat prediction. Then, at least 25% active time can be reduced. Measurement results show the fully integrated ECG-SoC consumes 6.14A including 1.28-A nonvolatile MCU and 0.7-A heart rate extractor.
Abstract:In this paper, in order to realize 0.4 V operation of STT-MRAM, we propose the counter base read circuit. The proposed read circuit has tolerance for process variation and temperature fluctuation by changing dynamically the load curve in a time-axis at the read operation. We confirmed that the proposed read circuit can operate at the conditions of five process corners (TT, FF, FS, SF, and SS) and three temperatures (−20• C, 25• C, and 100• C) by HSPICE simulations. At the condition of TT corner and 25• C, read time of the proposed circuit is 271 ns, and energy consumption is 1.05 pJ at "1" read operation and 1.23 pJ at "0" read operation.
This report describes a low power 6T-4C nonvolatile memory design using a bit-line non-precharge and plate-line charge-share techniques. Two proposed techniques contribute to decrease energy consumption. The bit-line nonprecharge technique can reduce 73% of write energy consumption and 76% of read energy consumption. The plateline charge-share technique can reduce 22% of store energy consumption and 11% of recall energy consumption.
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