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This paper presents a reconfigurable current-commutating passive mixer for multi-standard applications. By having controllable transconductance and transimpedance stages, the gain, noise figure and linearity of the mixer can be reconfigured. Fabricated in 0.18 m CMOS process, the mixer achieves a voltage-conversion-gain from 4 to 22 dB. The measured maximum IIP3 is 8.5 dBm and the minimum noise figure is 8.0 dB. The current consumption for a single branch (I or Q) ranges from 3.1 to 5.6 mA from a 1.8 V supply voltage. The chip occupies an area of 0.705 mm 2 including pads.

This paper reports a wideband passive mixer for direct conversion multi-standard receivers. A brief comparison between current-commutating passive mixers and active mixers is presented. The effect of source and load impedance on the linearity of a mixer is analyzed. Specially, the impact of the input impedance of the transimpedance amplifier (TIA), which acts as the load impedance of a mixer, is investigated in detail. The analysis is verified by a passive mixer implemented with 0.18 m CMOS technology. The circuit is inductorless and can operate over a broad frequency range. On wafer measurements show that, with radio frequency (RF) ranges from 700 MHz to 2.3 GHz, the mixer achieves 21 dB of conversion voltage gain with a -1 dB intermediate frequency (IF) bandwidth of 10 MHz. The measured IIP3 is 9 dBm and the measured double-sideband noise figure (NF) is 10.6 dB at 10 MHz output. The chip occupies an area of 0.19 mm 2 and drains a current of 5.5 mA from a 1.8 V supply.

This paper presents a wideband low noise amplifier (LNA) for multi-standard radio applications. The low noise characteristic is achieved by the noise-canceling technique while the bandwidth is enhanced by gateinductive-peaking technique. High-frequency noise performance is consequently improved by the flattened gain over the entire operating frequency band. Fabricated in 0.18 m CMOS process, the LNA achieves 2.5 GHz of -3 dB bandwidth and 16 dB of gain. The gain variation is within ˙0.8 dB from 300 MHz to 2.2 GHz. The measured noise figure (NF) and average IIP3 are 3.4 dB and -2 dBm, respectively. The proposed LNA occupies 0.39 mm 2 core chip area. Operating at 1.8 V, the LNA drains a current of 11.7 mA.

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