Spatial light modulators (SLMs) based on micromirrors for use in DUV lithography and adaptive optics require very high mirror planarity as well as mirror stability. The ideal mechanical properties of monocrystalline silicon make this material ideally suited for use in high precision optical MEMS devices. However, the integration of MEMS with CMOS poses certain restrictions on processing temperatures as well as on the compatibility of materials. The key to the successful fabrication of monocrystalline silicon micromirrors on CMOS is the silicon layer transfer process. Here, we discuss two carefully adapted wafer bonding processes that are CMOS compatible and that allow the transfer of a 300nm thick monocrystalline silicon thin film from a SOI donor wafer. One process is based on adhesive bonding using a patterned polymer layer, while the other process is based on direct bonding to a planarization layer of polished glass

The Fraunhofer Institute for Microelectronic Circuits and Systems (FhG-IMS) has developed spatial light modulators (SLM), which are used in a pattern generator for DUV laser mask writing developed by Micronic Laser Systems. They consist of micromirror arrays and allow massive parallel writing in UV mask writers. The chip discussed here consists of 2048 × 512 individually addressable mirrors and can be run at a frame rate of 1 to 2 kHz. For this application it is necessary that the SLMs can be operated under DUV light without changing their performance. This paper discusses a failure mechanism of the SLMs when operated in DUV light and countermeasures to eliminate this effect

Abstract— One of the most critical areas in the manufacturing process for FPD panels or shadow masks for CRTs is lithography. Most existing lithography technologies require high‐quality large‐area photomasks. The requirements on these photomasks include positioning accuracy (registration) and repeatability (overlay), systematic image quality errors (“mura” or display quality), and resolution (minimum feature size). The general trend toward higher resolution and improved performance, e.g., for TFT desktop monitors, has put a strong focus on the specifications for large‐area‐display photomasks. This article intends to give an overview of the dominant issues for large‐area‐display photomasks, and illustrates differences compared with other applications. The article will also present state‐of‐the‐art methods and trends. In particular, the aspects of positioning accuracy over large areas and systematic image‐quality errors will be described. New qualitative and objective methods have been developed as means to capture systematic image‐quality errors. Results indicating that errors below 25 nm can be found early in the manufacturing process is presented, thus allowing inspection for visual effects before the actual display is completed. Positioning accuracy below 400 nm (3 sigma) over 720 × 560 mm have been achieved. These results will in the future be extended up toward 1 × 1 m for generation 4 in TFT‐LCD production.