Flexible, stress-engineered spring interconnects are a novel technology potentially enabling room temperature assembly approaches to building highly integrated and multi-chip modules (MCMs). Such interconnects are an essential solderfree technology facilitating the MCM package diagnostics and rework. Previously, we demonstrated the performance, functionality, and reliability of compliant micro-spring interconnects under temperature cycling, humidity bias and high-current soak. Currently, we demonstrate for the first time the package with the 1st level conventional fine pitch C4 solder bump interconnects replaced by the arrays of microsprings. Dedicated CMOS integrated circuits (ICs) have been assembled onto substrates using these integrated microsprings. Metrology modules on the ICs are designed and used to characterize the connectivity and resistance of each microspring site.
IntroductionCurrent trends and progress in microelectronics continue to be enabled by chip packaging technologies. As die sizes, I/O count, and power densities grow, significant challenges develop in connecting chips to their first-level packages. Additionally, ongoing developments in 3D integration and multi-chip modules (MCMs) present new opportunities for novel I/O technologies that improve performance despite severe dimensional constraints.Electronic packaging based on stress-engineered spring interconnects [3,12] can potentially improve chip testing, rework, and mechanical compliance. With conventional flipchip bonding, the rigid solder reflown microbumps can cause package failure due to excessive shear, as there is a significant CTE mismatch between a silicon integrated circuit (IC) die and the package substrate. Spring-based interconnects, on the other hand, are flexible and compliant; they present a stressfree, lead-free packaging solution for connecting an IC die to ceramic and organic substrates. They also provide rematable connections to enable a reusable, reworkable MCM platform where an ability to separate non-functional and functional die, i.e. identifying known good die (KGD), is key to enhancing assembly yield.Previously, we have realized micro-spring prototypes that meet the stringent electrical and mechanical demands of a typical modern, high-performance microprocessor package; each spring provides <100 mΩ per connection and >30 μm of compliance; spring reliability was also confirmed under 0-100°C temperature cycling, 85/85 temperature humidity bias, and a high-current soak [1][2].
