This paper discusses the current total harmonic distortion (THDi) and voltage ripple minimization of SEPIC converter based on parameters design optimization. This conventional PFC SEPIC converter is designed to operate in discontinuous conduction mode in order to achieve almost unity power factor. The passive components, i.e., inductor and capacitor are designed based on switching frequency and resonant frequency. Meanwhile, the ranges of duty cycle for buck and boost operations are between 0

This paper presents the optimization of PFC Cuk converter parameter design for the minimization of THD and voltage ripple. In this study, the PFC Cuk converter is designed to operate in discontinuous conduction mode (DCM) in order to achieve almost unity power factor. The passive components, i.e., inductor and capacitor are designed based on switching frequency and resonant frequency. Nevertheless, the ranges of duty cycle for buck and boost operations are 0<D<0.5 and 0.5<D<1, respectively for the output voltage variation of the converter. The principle of the parameters design optimization is based on the balancing energy compensation between the input capacitor and output inductor for minimization of THD current. In addition, the selection of high output capacitance will minimize the output voltage ripple significantly. A 65 W PFC Cuk converter prototype is developed and experimentally tested to confirm the parameters design optimization principle. The experimental results show that the THD current is reduced to 4.5% from 61.3% and the output voltage ripple is reduced to 7 V from 18 V after parameters optimization are realized. Furthermore, it is confirmed that the output voltage ripple frequency is always double of the input line frequency, 50 Hz and the output voltage ripple is always lower than the maximum input voltage ripple.

This paper presents the comparison of resonant and passive lossless snubber circuits implementation for DC-DC boost converter to achieve soft-switching condition. By applying high switching frequency, the volume reduction of passive component can be achieved. However, the required of high switching frequency cause the switching loss during turn-ON and turn-OFF condition. In order to reduce the switching loss, soft-switching technique is required in order to reduce or eliminate the losses at switching devices. There are various of soft-switching techniques can be considered, either to reduce the switching loss during turn-ON only, or turn-OFF only, or both. This paper discusses comparative analyses of resonant and passive lossless snubber circuits which applied in the DC-DC boost converter structure. Based on the simulation results, the switching loss is approximately eliminated by applying soft-switching technique compared to the hard-switching technique implementation. The results show that the efficiency of resonant circuit and passive lossless snubber circuit are 82.99% and 99.24%, respectively. Therefore, by applying passive lossless snubber circuit in the DC-DC boost converter, the efficiency of the converter is greatly increased. Due to the existing of an additional capacitor in soft-switching circuit, it realizes lossless operation of DC-DC boost converter.

This paper discusses the optimization parameters design of combined SEPIC-Cuk converter based on SEPIC and Cuk operation for dual output voltage polarities. The SEPIC-Cuk converter is designed to be operated in continuous conduction mode, the selection of passive components, i.e., inductor and capacitor are based on the switching frequency, the duty cycle and inductor current ripple. The range of duty cycle for buck operation is 0

In this study, a modified single-switch bridgeless power factor correction (PFC) single-ended primary-inductor converter (SEPIC) structure is proposed. The major practical drawbacks of the existing structure are the presence of circulating current and high maximum current stress at the input capacitor and line diodes. Therefore, to overcome these problems, the existing structure is restructured by repositioning the line diodes in series with input inductors. Besides, the principle of design parameters optimisation is used based on the balancing energy compensation between input capacitors and output inductor. This structure is designed to operate in discontinuous conduction mode in order to achieve almost a unity power factor. The operation principle and design consideration of the modified structure is introduced in details. The experimental results demonstrate that the total harmonic distortion current is reduced from 56.3 to 4.9% after the optimisation process is performed, and at the same time the dead zones are inherently eliminated. Furthermore, it is shown that the output voltage ripple frequency is always double from the input line frequency of 50 Hz and the output voltage ripple is constantly lower than the maximum input voltage ripple. Thus, the designed parameters of the experimental converter are verified with ∼160 W of the converter output power.